STA680 datasheet(22/48 Pages) STMICROELECTRONICS

22 / 48 page

General description

STA680

22/48

DS5877 Rev 13

2.3

Dual channel HD 1.5 Radio processing

The STA680 is capable of simultaneously demodulating two different HD Radio streams.

This feature enables the device to decode the main HD Radio audio stream in parallel with

the data service broadcasted by a different radio channel (for instance this feature allows to

continue receiving traffic information provided by one radio station while listening to music

from a different station).

An example of implementation of the dual stream HD Radio processing is shown in

Figure 4.

2.4

Overview of main functional blocks

2.4.1

Adjacent channel filter

This module performs digital filtering of the IBOC channel. It receives the complex base-

band I/Q IBOC signal input from the tuner and pre-conditions the signal for subsequent

modem processing.

2.4.2

HiFi2 core

The HiFi2 is a signal processing engine specifically designed to provide high quality 24-bit

audio processing. The HiFi2 uses the Tensilica Xtensa LX engine with additional useful

hardware capabilities such as:



Specialized instructions for 24-bit Audio MAC & stream coding



Dual MAC (each supports 24 x 24 and 32 x 16 bit format)



Huffman Encode / Decode and truncate functions



Two way Single-Instruction-Multiple-Data arithmetic and logic operations

2.4.3

Vectra core

The Vectra LX is an on-chip, powerful, 32-bit RISC engine optimized for DSP with VLIW

capabilities. The Vectra LX includes eight MAC units, sixteen 160-bit vector operation

registers, and a number of SIMD arithmetic instructions. Custom instructions in the Vectra

are tailored to DSP applications such as filters and FFTs. The Vectra processor has been

further configured with specific instructions for efficient performance on the HD Radio

application.

2.4.4

DMA

A ten-channel DMA controller is attached to the AHB bus to allow the Vectra and HiFi2

processor cores to efficiently move large data-blocks.

2.4.5

Hardware accelerator (VITERBI)

The complex convolutional Viterbi hardware accelerator supports both K constants of 7 and

9, for IBOC digital FM and AM processing respectively.

STA680 Datasheet(PDF) 22 Page - STMicroelectronics

STA680 Datasheet(HTML) 22 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Descarga

Enlace URL