CLC014 datasheet(12/17 Pages) NSC

12 / 17 page

Layout and Measurement

The printed circuit board layout for the CLC014 requires

proper high-speed layout to achieve the performance speci-

fications found in the datasheet. The following list contains a

few rules to follow:

Use a ground plane.

Decouple power pins with 0.1 µF capacitors placed

≤ 0.1” (3mm) from the power pins.

Design transmission strip lines from the CLC014’s input

and output pins to the board connectors.

Route outputs away from inputs.

Keep ground plane

≥ 0.025” (0.06mm) away from the

input and output pads.

Figure 8 shows a block level measurement diagram, while

Figure 15 on depicts a detailed schematic. A pseudo-random

pattern generator with low output jitter was used to provide a

NRZI pattern to create the eye diagrams shown in the Typi-

cal Performance Characteristics section.

Since most pattern generators have a 50

Ω output imped-

ance, a translation can be accomplished using a CLC006

Cable Driver as an impedance transformer. A wide band-

width oscilloscope is needed to observe the high data rate

eye pattern. When monitoring a single output that is termi-

nated at both the equalizer output and the oscilloscope, the

effective output load is 37.5

Ω. Consequently, the signal

swing is half that observed for a single-ended 75

Ω

termination.

Troubleshooting with scope probes can affect the equaliza-

tion. For high data rates, use a low capacitance probe with

less than 2 pF probe capacitance. Evaluation boards and

literature are available for quick prototyping and evaluation

of the CLC014 Adaptive Cable Equalizer. The CLC014 con-

tains CMOS devices and operators should use grounding

straps when handling the parts.

Figure 9 shows the CLC014’s internal power supply routing.

Bypass V

CC (pin 4) by:

•

Monolithic capacitor of about 0.1 µF placed less than 0.1”

(3mm) from the pin

•

Tantalum capacitor of about 6.8 µF for large current

signal swings placed as close as convenient to the

CLC014

10005628

FIGURE 8. Typical Measurement Block

10005629

FIGURE 9. Power Package Routing Fixture

CLC014 Datasheet(PDF) 12 Page - National Semiconductor (TI)

CLC014 Datasheet(HTML) 12 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

Datasheet Descarga

Enlace URL