CLC014 datasheet(13/17 Pages) NSC

13 / 17 page

Layout and Measurement (Continued)

To minimize ringing at the CLC014’s inputs, place a 100

Ω

resistor in series with the input. This resistor reduces induc-

tance effects.

Several layout techniques can improve high speed perfor-

mance:

•

Keep input, output and AEC traces well separated

•

Use balanced input termination’s

•

Avoid routing traces close to the CLC014’s input trace

•

Maintain common return points for components

•

Use guard traces

The input lines of the CLC014 use a 100

Ω series resistors at

the input pins. This decreases the inductive effects internal

to the part to reduce ringing on fast rise and fall times. Refer

to the evaluation board layout for further suggestions on

layout for the CLC014 Adaptive Equalizer.

EQUALIZATION CURVE

The CLC014 Adaptive Cable Equalizer has a maximum

equalization response as shown in Figure 10. This response

may be obtained by forcing >0.5V differentially at the AEC

pins.

CABLE EMULATION BOXES

Some cable emulation boxes will not mimic cables correctly.

When evaluating the CLC014, it is strongly recommended

that actual cable be used to determine the various perfor-

mance parameters.

Typical Applications

COAXIAL CABLE RECEIVER (Page 1)

The CLC014 equalizer application shown on page 1 will

equalize a variety of coaxial cables up to lengths that attenu-

ate the signal by 40 dB at 200 MHz. The application shows

the proper connection for a single cable driven with a

CLC006 driver. Carrier Detect (CD) is connected to MUTE to

latch outputs DO and DO in the absence of an input signal to

the equalizer.

Refer to the CLC014’s evaluation board layout for additional

suggestions.

National can supply most of the major components required

to design a transmission line repeater. Figure 11 shows a

typical repeater design using the CLC006, CLC014, and the

CLC016. The design functions supported by each chip are:

CLC006: Cable connection chip

Boosts drive for transmission to next repeater or

final destinations

CLC014: Receive serialized digital data from incoming

transmission lines

Equalizes the incoming data

CLC016: Retimes the equalized data (improving jitter)

The CLC016 is a multi-rate data retiming PLL. The circuit

(Figure 11) will work at up to 4 different data rates with no

additional components or manual tuning.

Frequency (Hz)

10k

100k

10M

100M

10005630

FIGURE 10. Maximum Equalization Response

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