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AS7261 Datasheet(PDF) 10 Page - ams-OSRAM AG |
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AS7261 Datasheet(HTML) 10 Page - ams-OSRAM AG |
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10 / 48 page ![]() ams Datasheet Page 9 [v1-00] 2016-Dec-30 Document Feedback AS7261 − Electrical Characteristics Figure 9: AS7261SPI Slave Timing Characteristics Figure 10: SPI Master Write Timing Diagram Symbol Parameter Conditions Min Typ Max Unit SPI Interface fSCLK Clock Frequency 0 16 MHz tSCK_H Clock high time 40 ns tSCK_L Clock low time 40 ns tSCK_RISE SCK rise time 5 ns tSCK_FALL SCK fall time 5 ns tCSN_S CSN setup time Time between CSN high-low transition to first SCK high transition 50 ns tCSN_H CSN hold time Time between last SCK falling edge and CSN low-high transition 100 ns tCSN_DIS CSN disable time 100 ns tDO_S Data-out setup time 5 ns tDO_H Data-out hold time 5 ns tDI_V Data-in valid 10 ns tDO_H tCSN_H CSN MOSI MISO SCK tCSN_S MSB tDO_S LSB HI-Z HI-Z tCSN_DIS tSCK_RISE tSCK_FALL |
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