AS7261 datasheet(22/48 Pages) AMSOSRAM

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[v1-00] 2016-Dec-30

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AS7261 − Detailed Descriptions

I²C Virtual Register Set

The figure below provides a summary of the AS7261 I²C register

set. Figures after that provide additional register details. All

(most significant byte is situated at the lowest register address).

Multiple byte registers (2 byte integer, or, 4 byte floating point)

must be read in the order of ascending register addresses (low

to high). And if capable of being written to, must also be written

in the order ascending register addresses.

Figure 21:

I²C Virtual Register Set Overview

Addr

Name

<D7>

<D6>

<D5>

<D4>

<D3>

<D2>

<D1>

<D0>

Version Registers

0x00:0x01

HW_Version

Hardware Version

0x02:0x03

FW_Version

Firmware Version

Control Registers

0x04

Control_Setup

RST

INT

GAIN

Bank

DATA_

RDY

RSVD

0x05

INT_T

Integration Time

0x06

Device_Temp

Device Temperature

0x07

LED_Control

RSVD

ICL_DRV

LED_

DRV

ICL_IND

LED_IND

Sensor Raw Data Registers

0x08

X_High

Channel X High Data Byte

0x09

X_Low

Channel X Low Data Byte

0x0A

Y_High

Channel Y High Data Byte

0x0B

Y_Low

Channel Y Low Data Byte

0x0C

Z_High

Channel Z High Data Byte

0x0D

Z_Low

Channel Z Low Data Byte

0x0E

NIR_High

Channel NIR High Data Byte

0x0F

NIR_Low

Channel NIR Low Data Byte

0x10

Dark_High

Channel Dark High Data Byte

0x11

Dark_Low

Channel Dark Low Data Byte

0x12

Clear_High

Channel Clear High Data Byte

0x13

Clear_Low

Channel Clear Low Data Byte

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