TDA7572 datasheet(38/64 Pages) STMICROELECTRONICS

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Input stage and gain compressor

TDA7572

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is clipping during that period. The THD estimate is calculated from the ratio between these

times. Clipping means are any of the following conditions occurred: maximum modulation

reached, output current limiting active, or voltage clipping at the AOUT pin. These are used

to estimate THD, which is then mapped to a desired number of discrete steps of gain

reduction. Attenuation is then changed at the next zero crossing of the signal at the Input

Stage block

The attack time sets the minimum time allowed between gain reductions. At low frequency

signals, where the time between zero crossings is greater than the attack time, the attack

rate is dictated by the signal frequency, rather than this setting. Similarly, the decay time sets

the minimum time allowed between gain increases, with the same caveats about rate

dictated by the signal frequency.

The major tuning control here is the distortion-to-attenuation lookup table. It will determine

how aggressively to operate and thus the relative amount of audible artifact. Decay time

adjustment can be varied for audible effect and to mange average power.

Following are reported the correspondence between I2C bus registers and coefficients for

Attack and decay time. The first table reports the one for compressor setting:

6.2.1

Setting in I2C bus mode

GainTable[1:0]: Selects the distortion versus gain step size table to be used, including the

ability to disable the gain compressor.

RELEASE[1:0]: Sets the maximum release rate of the gain compressor according to the

table below:

Table 28.

Distortion versus gain step size

GainTable [1:0]

Pseudo THD,% / T2/T1 ratio

Number of gain steps

Gain compressor disabled

0.02

3.0

0.02

3.0

5.0

0.02

3.0

5.0

15.0

Table 29.

Sets the maximum release rate of the gain compressor

Release [1:0]

Clock counts

Nominal time at 400KHz clock

213

20.48ms

214

40.96ms

215

81.92ms

216

163.4ms

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