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MPC8313ECVRGDDA Datasheet(PDF) 53 Page - Freescale Semiconductor, Inc |
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MPC8313ECVRGDDA Datasheet(HTML) 53 Page - Freescale Semiconductor, Inc |
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53 / 100 page ![]() MPC8313E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 2.1 Freescale Semiconductor 53 JTAG Figure 44 provides the boundary-scan timing diagram. Figure 44. Boundary-Scan Timing Diagram Figure 45 provides the test access port timing diagram. Figure 45. Test Access Port Timing Diagram VM = Midpoint Voltage (NVDD/2) VM VM tJTDVKH tJTDXKH Boundary Data Outputs Boundary Data Outputs JTAG External Clock Boundary Data Inputs Output Data Valid tJTKLDX tJTKLDZ tJTKLDV Input Data Valid Output Data Valid VM = Midpoint Voltage (NVDD/2) VM VM tJTIVKH tJTIXKH JTAG External Clock Output Data Valid tJTKLOX tJTKLOZ tJTKLOV Input Data Valid Output Data Valid TDI, TMS TDO TDO |
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