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TUSB3200 Datasheet(PDF) 73 Page - Texas Instruments |
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TUSB3200 Datasheet(HTML) 73 Page - Texas Instruments |
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73 / 93 page  A–25 A.5.2.10DMA Channel 0 Time Slot Assignment Register (Low Byte) (DMATSL0 – Address FFEAh) The DMA channel 0 time slot assignment register (low byte) contains the eight least significant time slot bits. The time slot assignment bits are used to define which CODEC port interface time slots are supported by DMA channel 0. The DMA channel will control the transfer of data between the USB endpoint buffers and the CODEC port interface registers based on which bits are set. The direction of the data transfer depends on the value of the USB endpoint direction bit (EPDIR) in the DMA channel 0 control register. The desired time slot bits should be set by the MCU before the DMA channel is enabled. There are a total of fourteen time slot bits for each DMA channel. Bit 7 6 5 4 3 2 1 0 Mnemonic TSL7 TSL6 TSL5 TSL4 TSL3 TSL2 TSL1 TSL0 Type R/W R/W R/W R/W R/W R/W R/W R/W Default 0 0 0 0 0 0 0 0 BIT MNEMONIC NAME DESCRIPTION 7:0 TSL(7:0) Time slot assignment The DMA time slot assignment bits are set to a 1 by the MCU to define the CODEC port interface time slots supported by this DMA channel. A.5.2.11DMA Channel 0 Time Slot Assignment Register (High Byte) (DMATSH0 – Address FFE9h) The DMA channel 0 time slot assignment register (high byte) contains the six most significant time slot bits. In addition, this register contains the bytes per time slot control bits. Bit 7 6 5 4 3 2 1 0 Mnemonic BPTS1 BPTS0 TSL13 TSL12 TSL11 TSL10 TSL9 TSL8 Type R/W R/W R/W R/W R/W R/W R/W R/W Default 0 0 0 0 0 0 0 0 BIT MNEMONIC NAME DESCRIPTION 7:6 BPTS(1:0) Bytes per time slot The bytes per time slot bits are used to define the number of bytes to be transferred for each time slot supported by this DMA channel. 00b = 1 byte, 01b = 2 bytes, 10b = 3 bytes, 11b = 4 bytes 5:0 TSL(13:8) Time slot assignment The DMA time slot assignment bits are set to a 1 by the MCU to define the CODEC port interface time slots supported by this DMA channel. |
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