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MPC5634M Datasheet(PDF) 29 Page - Freescale Semiconductor, Inc |
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MPC5634M Datasheet(HTML) 29 Page - Freescale Semiconductor, Inc |
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29 / 118 page ![]() Pinout and signal description MPC5634M Microcontroller Data Sheet, Rev. 4 Preliminary—Subject to Change Without Notice Freescale Semiconductor 29 1.4.2 Block summary Table 2 summarizes the functions of the blocks present on the MPC5634M series microcontrollers. 2 Pinout and signal description This section contains the pinouts for all production packages for the MPC5634M family of devices. Please note the following: • Pins labeled “NC” are to be left unconnected. Any connection to an external circuit or voltage may cause unpredictable device behavior or damage. • Pins labeled “NIC” have no internal connection. Table 2. MPC5634M series block summary Block Function e200z3 core Executes programs and interrupt handlers. Flash memory Provides storage for program code, constants, and variables RAM (random-access memory) Provides storage for program code, constants, and variables Calibration bus Transfers data across the crossbar switch to/from peripherals attached to the VertiCal connector DMA (direct memory access) Performs complex data movements with minimal intervention from the core DSPI (deserial serial peripheral interface) Provides a synchronous serial interface for communication with external devices eMIOS (enhanced modular input-output system) Provides the functionality to generate or measure events eQADC (enhanced queued analog-to-digital converter) Provides accurate and fast conversions for a wide range of applications eSCI (serial communication interface) Allows asynchronous serial communications with peripheral devices and other microcontroller units eTPU (enhanced time processor unit) Processes real-time input events, performs output waveform generation, and accesses shared data without host intervention FlexCAN (controller area network) Supports the standard CAN communications protocol FMPLL (frequency-modulated phase-locked loop) Generates high-speed system clocks and supports the programmable frequency modulation of these clocks INTC (interrupt controller) Provides priority-based preemptive scheduling of interrupt requests JTAG controller Provides the means to test chip functionality and connectivity while remaining transparent to system logic when not in test mode NPC (Nexus Port Controller) Provides real-time development support capabilities in compliance with the IEEE-ISTO 5001-2003 standard PIT (peripheral interrupt timer) Produces periodic interrupts and triggers Temperature sensor Provides the temperature of the device as an analog value SWT (Software Watchdog Timer) Provides protection from runaway code STM (System Timer Module) Timer providing a set of output compare events to support AutoSAR and operating system tasks |
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