Rev 1.00

March 22, 2010

5

HT45B0K

SPI to USB Bridge

Functional Description

The MCU communicates with the USB Module via an internal SPI interface. The SPI interface

on this device is comprised of four signals:

(SPI Chip Select), SCK (SPI Clock), SDI (Serial

Data Input) and SDO (Serial Data Output). The SPI master, which is the MCU, asserts

by

pulling it low to start the data transaction cycle. When the first 8 bits of data are transmitted,

should not return to a high level. Instead,

must remain at a low level until the whole 16-bit

data transaction is completed. If

is de-asserted, that is returned to a high level, before the 16-

bit data transaction is completed, all data bits will be discarded by the USB Module SPI slave.

SPI Interface

Both read and write operations are conducted along the SPI common interface with the following

format:

● Write Type Format: 8-bit command input + 8-bit data input

● Read Type Format: 8-bit command input + 8-bit data output

To initiate a data transaction, the MCU master SPI needs to pull

to a low level first and then

also pull SCK low. The input data bit on SDI should be stable before the next SCK rising edge,

as the device will latch the SDI status on the next SCK rising edge. Regarding the SDO line, the

output data bit will be updated on the SCK falling edge. The master needs to obtain the line status

before the next SCK falling edge.

There are 16 bits of data transmitted and/or received by the SPI interface for each transaction. Each

transaction consists of a command phase and a data phase. When

is high, the SPI interface is

disabled and SDO will be set to a high impedance state.

After a complete transaction has been implemented, which requires 16 SCK clock cycles, the

master needs to set

to a high level in preparation for the next data transaction.

For write operations, the device will begin to execute the command only after it receives a 16-bit

serial data sequence and when the

has been set high again by the master.

For read operations, the device will begin to execute the command only after it receives an 8-bit

read command after which it will be ready to output data. If necessary, the master can de-assert

the

pin to abort the transaction at any time which will cause any data transactions to be

abandoned.

SPI Timing

There are 2 types of commands:

● Read Register

● Write Register

Commands and Registers

Command Type

Bit.7

Bit.6

Bit.5

Bit.4

Bit.3

Bit.2

Bit.1

Bit.0

Read Register

0

X

X

A4

A3

A2

A1

A0

Write Register

1

X

X

A4

A3

A2

A1

A0

There are 17 registers available to control the USB module which are addressed by 5 address bits

A4~ A0 of Read /Write Register commands.

Command/Address Format