Rev 1.00

March 22, 2010

8

HT45B0K

SPI to USB Bridge

Address

Name

POR state

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

00H

USC

--00 0000

――

PLL

V33C

RESUME

URST RMWK

SUSP

01H

USR

--00 0000

――

EP5IF

EP4IF

EP3IF

EP2IF

EP1IF

EP0IF

02H

UCC

-0-0 0000

―

SYSCLK

―

SUSP2 USBCKEN EPS2

EPS1

EPS0

03H

AWR

0000 0000 UAD6

UAD5

UAD4

UAD3

UAD2

UAD1

UAD0

WKEN

04H

STALL

--11 1110

――

STL5

STL4

STL3

STL2

STL1

STL0

05H

SIES

0100 0000

NMI

EOT

CRCF

NAK

IN

OUT

ERR

ASET

06H

MISC

0x1- -000

LEN0

READY SETCMD

――

CLEAR

TX

REQUEST

07H

SETIO

--11 1110

――

SETIO5 SETIO4

SETIO3

SETIO2 SETIO1 DATATG

08H

UIC

--00 0000

――

EU5I

EU4I

EU3I

EU2I

EU1I

EU0I

09H

Unused

---- ----

Reserved

0AH

PIPE

0-00 000- SUSPC

―

EP5E

EP4E

EP3E

EP2E

EP1E

―

0BH

SWRST

---- ---0

――

―

―

―

―

―

RESET

0CH~0FH Unused

---- ----

Reserved

10H

FIFO0

XXXX XXXX

Data for endpoint 0

11H

FIFO1

XXXX XXXX

Data for endpoint 1

12H

FIFO2

XXXX XXXX

Data for endpoint 2

13H

FIFO3

XXXX XXXX

Data for endpoint 3

14H

FIFO4

XXXX XXXX

Data for endpoint 4

15H

FIFO5

XXXX XXXX

Data for endpoint 5

16H~1FH Unused

---- ----

Reserved

USB Register Summary

USC Register

The USC register contains the status bits for USB suspend, resume and reset indications. It also

contains the bits used to control the Remote Wake-up, V33O output and PLL functions. Further

explanation on each bit is given below:

USC Register

Bit

76543210

Name

――

PLL

V33C

RESUME

URST

RMWK

SUSP

R/W

――

R/W

R/W

R

R

R/W

R

POR

――

000000

Bit 7~6

Unimplemented, read as “0”.

Bit 5

PLL: PLL enable control

0: turn on the PLL

1: turn off the PLL

Bit 4

V33C: V33O output enable control

0: turn off the V33O output

1: turn on the V33O output

Bit 3

RESUME: USB resume indication flag

0: USB device does not receive the resume signal or has left the suspend mode.

1: USB device receives the resume signal and is going to leave the suspend mode.

When the USB device receives the resume signal, this bit is set to 1 by SIE. This bit will

appear for about 20ms, waiting for the MCU to detect it. When the RESUME is set by

SIE, an interrupt will be generated to wake up the MCU. In order to detect the suspend

state, MCU should set the USBCKEN bit to 1 and clear the PLL and SUSPC bits to 0 to

enable the SIE and PHY functions. The RESUME bit will be cleared when the SUSP bit