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MC68HC705MC4MP Datasheet(PDF) 86 Page - Freescale Semiconductor, Inc

No. de pieza MC68HC705MC4MP
Descripción Electrónicos  General Release Specification
PDF  180 Pages
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Fabricante Electrónico  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68HC705MC4MP Datasheet(HTML) 86 Page - Freescale Semiconductor, Inc

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16-Bit Timer
MC68HC705MC4 — Rev. 2.0
16-Bit Timer
Figure 9-6. Output Compare Software Initialization Example
Figure 9-7. State Timing Diagram for Output Compare
9B
.
.
B6
BE
B7
B6
BF
.
.
9A
.
.
XX
XX
1D
18
1E
.
.
SEI
.
.
LDA
LDX
STA
LDA
STX
.
.
CLI
.
.
DATAH
DATAL
OCRH
TSR
OCRL
.
.
BLOCK INTERRUPTS
.
.
HI BYTE FOR COMPARE
LO BYTE FOR COMPARE
INHIBIT OUTPUT COMPARE
ARM OCF BIT TO CLEAR
READY FOR NEXT COMPARE
.
.
UNBLOCK INTERRUPTS
INTERNAL
TIMER
T00
T01
T10
T11
OUTPUT COMPARE
16-BIT
$FFEB
$FFED
$FFEE
$FFEC
OUTPUT COMPARE
$FFED
CPU WRITES $FFED
$FFEF
FLAG AND PIN
REGISTERS
NOTES:
1. A write to the output compare registers may occur at any time, but a compare only occurs at
timer state T01. Therefore, the compare may follow the write by up to four cycles.
2. The output compare flag is set at the timer state T11 that follows the comparison latch.
BUS CLOCK
CLOCKS
COUNTER
COMPARE
REGISTER LATCH
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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