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MC68HC705MC4MP Datasheet(PDF) 97 Page - Freescale Semiconductor, Inc

No. de pieza MC68HC705MC4MP
Descripción Electrónicos  General Release Specification
PDF  180 Pages
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Fabricante Electrónico  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68HC705MC4MP Datasheet(HTML) 97 Page - Freescale Semiconductor, Inc

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Pulse Width Modulator
PWM Registers
General Release Specification
Pulse Width Modulator
.
Figure 10-1. PWM Block Diagram
data register interlock mechanism is managed by mapping each data
register to an interlock address (PWMx-I) and a direct address
(PWMx-D). Writes to the interlock address will engage the interlock
mechanism. Writes to the direct address will not engage the interlock
mechanism unless it is already engaged prior to the write. A write to the
direct address will therefore take immediate effect (if the corresponding
update bit is set) or at the end of the current PWM cycle (if the
corresponding update bit is cleared).
MODULUS &
COMPARATOR B
MODULUS &
COMPARATOR A
BUFFER
8-BIT COUNTER
PWM CONTROL REGISTER B
PWM CONTROL REGISTER A
8-BIT COUNTER
OSC1
RA[2:0]
RA[3]
RB[2:0]
RB[3]
PWM DATA A
BUFFER
PWM DATA B
TO ENABLE
TO
PA1/PWMA1
PA3/PWMA2
PA5/PWMA3
MUX &
CLOCK
GENERATOR
÷ 1.5
CIRCUIT
(6 MHz)
÷ 1.5
CIRCUIT
PA2/PWMB1
PA4/PWMB2
PA6/PWMB3
PORT
LOGIC
MUX &
PORT
LOGIC
ENABLE
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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