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INTEDG Datasheet(PDF) 118 Page - Microchip Technology

No. de pieza INTEDG
Descripción Electrónicos  64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology
PDF  478 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

INTEDG Datasheet(HTML) 118 Page - Microchip Technology

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PIC16(L)F1946/47
DS41414D-page 118
 2010-2012 Microchip Technology Inc.
EXAMPLE 11-4:
ERASING ONE ROW OF PROGRAM MEMORY -
; This row erase routine assumes the following:
; 1. A valid address within the erase block is loaded in ADDRH:ADDRL
; 2. ADDRH and ADDRL are located in shared data memory 0x70 - 0x7F (common RAM)
BCF
INTCON,GIE
; Disable ints so required sequences will execute properly
BANKSEL
EEADRL
MOVF
ADDRL,W
; Load lower 8 bits of erase address boundary
MOVWF
EEADRL
MOVF
ADDRH,W
; Load upper 6 bits of erase address boundary
MOVWF
EEADRH
BSF
EECON1,EEPGD
; Point to program memory
BCF
EECON1,CFGS
; Not configuration space
BSF
EECON1,FREE
; Specify an erase operation
BSF
EECON1,WREN
; Enable writes
MOVLW
55h
; Start of required sequence to initiate erase
MOVWF
EECON2
; Write 55h
MOVLW
0AAh
;
MOVWF
EECON2
; Write AAh
BSF
EECON1,WR
; Set WR bit to begin erase
NOP
; Any instructions here are ignored as processor
; halts to begin erase sequence
NOP
; Processor will stop here and wait for erase complete.
; after erase processor continues with 3rd instruction
BCF
EECON1,WREN
; Disable writes
BSF
INTCON,GIE
; Enable interrupts



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