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INTEDG Datasheet(PDF) 165 Page - Microchip Technology

No. de pieza INTEDG
Descripción Electrónicos  64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology
PDF  478 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

INTEDG Datasheet(HTML) 165 Page - Microchip Technology

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 2010-2012 Microchip Technology Inc.
DS41414D-page 165
PIC16(L)F1946/47
16.1.5
INTERRUPTS
The ADC module allows for the ability to generate an
interrupt upon completion of an Analog-to-Digital
conversion. The ADC Interrupt Flag is the ADIF bit in
the PIR1 register. The ADC Interrupt Enable is the
ADIE bit in the PIE1 register. The ADIF bit must be
cleared in software.
This interrupt can be generated while the device is
operating or while in Sleep. If the device is in Sleep, the
interrupt will wake-up the device. Upon waking from
Sleep, the next instruction following the SLEEP instruc-
tion is always executed. If the user is attempting to
wake-up from Sleep and resume in-line code execu-
tion, the GIE and PEIE bits of the INTCON register
must be disabled. If the GIE and PEIE bits of the
INTCON register are enabled, execution will switch to
the Interrupt Service Routine.
16.1.6
RESULT FORMATTING
The 10-bit A/D conversion result can be supplied in two
formats, left justified or right justified. The ADFM bit of
the ADCON1 register controls the output format.
Figure 16-3 shows the two output formats.
FIGURE 16-3:
10-BIT A/D CONVERSION RESULT FORMAT
Note 1:
The ADIF bit is set at the completion of
every conversion, regardless of whether
or not the ADC interrupt is enabled.
2:
The ADC operates during Sleep only
when the FRC oscillator is selected.
ADRESH
ADRESL
(ADFM = 0)MSB
LSB
bit 7
bit 0
bit 7
bit 0
10-bit A/D Result
Unimplemented: Read as ‘0’
(ADFM = 1)
MSB
LSB
bit 7
bit 0
bit 7
bit 0
Unimplemented: Read as ‘0’
10-bit A/D Result



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