INTEDG datasheet(169/478 Pages) MICROCHIP

169 / 478 page

 2010-2012 Microchip Technology Inc.

DS41414D-page 169

PIC16(L)F1946/47

ADCON1: A/D CONTROL REGISTER 1

R/W-0/0

U-0

R/W-0/0

ADFM

ADCS<2:0>

—

ADNREF

ADPREF<1:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7

ADFM:

A/D Result Format Select bit

1 = Right justified. Six Most Significant bits of ADRESH are set to ‘0’ when the conversion result is

loaded.

0 = Left justified. Six Least Significant bits of ADRESL are set to ‘0’ when the conversion result is

loaded.

bit 6-4

ADCS<2:0>:

A/D Conversion Clock Select bits

111 =FRC (clock supplied from a dedicated RC oscillator)

110 =FOSC/64

101 =FOSC/16

100 =FOSC/4

011 =FRC (clock supplied from a dedicated RC oscillator)

010 =FOSC/32

001 =FOSC/8

000 =FOSC/2

bit 3

Unimplemented:

Read as ‘0’

bit 2

ADNREF:

A/D Negative Voltage Reference Configuration bit

1 =VREF- is connected to external VREF- pin(1)

0 =VREF- is connected to VSS

bit 1-0

ADPREF<1:0>:

A/D Positive Voltage Reference Configuration bits

11 =VREF+ is connected to internal Fixed Voltage Reference (FVR) module(1)

10 =VREF+ is connected to external VREF+ pin(1)

01 = Reserved

00 =VREF+ is connected to VDD

Note 1:

When selecting the FVR or the VREF+ pin as the source of the positive reference, be aware that a

minimum voltage specification exists. See Section 30.0 “Electrical Specifications” for details.

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