INTEDG datasheet(199/478 Pages) MICROCHIP

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 2010-2012 Microchip Technology Inc.

DS41414D-page 199

PIC16(L)F1946/47

21.0 TIMER1 MODULE WITH GATE

CONTROL

The Timer1 module is a 16-bit timer/counter with the

following features:

• 16-bit timer/counter register pair (TMR1H:TMR1L)

• Programmable internal or external clock source

• 2-bit prescaler

• Dedicated 32 kHz oscillator circuit

• Optionally synchronized comparator out

• Multiple Timer1 gate (count enable) sources

• Interrupt on overflow

• Wake-up on overflow (external clock,

Asynchronous mode only)

• Time base for the Capture/Compare function

• Special Event Trigger (with CCP/ECCP)

• Selectable Gate Source Polarity

• Gate Toggle mode

• Gate Single-Pulse mode

• Gate Value Status

• Gate Event Interrupt

Figure 21-1 is a block diagram of the Timer1 module.

FIGURE 21-1:

TIMER1 BLOCK DIAGRAM

TMR1H

TMR1L

T1SYNC

T1CKPS<1:0>

Prescaler

1, 2, 4, 8

Synchronized

clock input

Set flag bit

TMR1IF on

Overflow

TMR1(2)

TMR1ON

Note 1: ST Buffer is high speed type when using T1CKI.

2: Timer1 register increments on rising edge.

3: Synchronize does not operate while in Sleep.

T1G

T1OSC

FOSC/4

Internal

Clock

T1OSO

T1OSI

T1OSCEN

T1CKI

TMR1CS<1:0>

(1)

Synchronize(3)

det

Sleep input

TMR1GE

T1GPOL

T1GVAL

T1GTM

Single-Pulse

Acq. Control

T1GSPM

T1GGO/DONE

T1GSS<1:0>

OUT

FOSC

Internal

Clock

Cap. Sensing

T1GCON

Data Bus

det

Interrupt

TMR1GIF

Set

T1CLK

FOSC/2

Internal

Clock

t1g_in

TMR1ON

Oscillator

From Timer0

Overflow

sync_C2OUT

sync_C1OUT

To Comparator Module

To LCD and Clock Switching Modules

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