AM79C960KCW datasheet(44/127 Pages) AMD

44 / 127 page

P R E L I M I N A R Y

AMD

1-386

Am79C960

Negative link beat pulses are defined as transmitted sig-

nals with a negative amplitude greater than 585 mV with

a pulse width of 60 ns–200 ns. This negative excursion

may be followed by a positive excursion. This definition

is consistent with the expected received signal at a re-

verse wired receiver, when a link beat pulse which fits

the template of Figure 14–12 in the 10BASE-T Standard

is generated at a transmitter and passed through 100 m

of twisted pair cable.

The polarity detection/correction algorithm will remain

“armed” until two consecutive packets with valid ETD of

identical polarity are detected. When “armed,” the re-

ceiver is capable of changing the initial or previous

polarity configuration according to the detected ETD

polarity.

On receipt of the first packet with valid ETD following re-

set or Link Fail, the T-MAU will use the inferred polarity

information to configure its RXD

± input, regardless of its

previous state. On receipt of a second packet with a

valid ETD with correct polarity, the detection/correction

algorithm will “lock-in” the received polarity. If the sec-

ond (or subsequent) packet is not detected as

confirming the previous polarity decision, the most re-

cently detected ETD polarity will be used as the default.

Note that packets with invalid ETD have no effect on up-

dating the previous polarity decision. Once two

consecutive packets with valid ETD have been re-

ceived, the T-MAU will lock the correction algorithm until

either a Link Fail condition occurs or RESET is asserted.

During polarity reversal, an internal POL signal will be

active. During normal polarity conditions, this internal

POL signal is inactive. The state of this signal can be

read by software and/or displayed by LED when en-

abled by the LED control bits in the ISA Bus

Configuration Registers (ISACSR5, 6, 7).

Twisted Pair Interface Status

Three signals (XMT, RCV and COL) indicate whether

the T-MAU is transmitting, receiving, or in a collision

state. These signals are internal signals and the behav-

ior of the LED outputs depends on how the LED output

circuitry is programmed.

The T-MAU will power up in the Link Fail state and the

normal algorithm will apply to allow it to enter the Link

Pass state. In the Link Pass state, transmit or receive

activity will be indicated by assertion of RCV signal go-

ing active. If T-MAU is selected using the PORTSEL bits

in CSR15 or MAUSEL pin, then when moving from AUI

to T-MAU selection the T-MAU will be forced into the

Link Fail state.

In the Link Fail state, XMT, RCV and COL are inactive.

Collision Detect Function

Activity on both twisted pair signals RXD

± and TXD±

constitutes a collision, thereby causing the COL signal

to be asserted. (COL is used by the LED control cir-

cuits.) The COL will remain asserted until one of the two

colliding signals changes from active to idle. During col-

lision condition, data presented on the DI

± pair will be

sourced from the RXD

± input. COL stays active for two

bit times at the end of a collision.

Signal Quality Error (SQE) Test

(Heartbeat) Function

The SQE function is disabled when the 10BASE-T port

is selected and in Link Fail state.

Jabber Function

The Jabber function inhibits the twisted pair transmit

function of the T-MAU if theTXD

± circuit is active for an

excessive period (20–150 ms). This prevents any one

node from disrupting the network due to a ‘stuck-on’ or

faulty transmitter. If this maximum transmit time is ex-

ceeded, the T-MAU transmitter circuitry is disabled, the

JAB bit is set (CSR4, bit 1), and COL signal asserted.

Once the transmit data stream to the T-MAU is re-

moved, an “unjab” time of 250–750 ms will elapse

before the T-MAU deasserts COL and re-enables the

transmit circuitry.

Power Down

The T-MAU circuitry can be made to go into low power

mode. This feature is useful in battery powered or low

duty cycle systems. The T-MAU will go into power down

mode when RESET is active, coma mode is active, or

the T-MAU is not selected. Refer to the Power Down

Mode section for a description of the various power

down modes.

Any of the three conditions listed above resets the inter-

nal logic of the T-MAU and places the device into power

down mode. In this mode, the Twisted Pair driver pins

(TXD

±,TXP±) are asserted LOW, and the internal T-

MAU status signals (LNKST, RCVPOL, XMT, RCV and

COLLISION) are inactive.

Once the

SLEEP pin is deasserted, the T-MAU will be

forced into the Link Fail state. The T-MAU will move to

the Link Pass state only after 5 - 6 link beat pulses and/or

a single received message is detected on the RXD

pair.

In snooze mode, the T-MAU receive circuitry will remain

enabled even while the

SLEEP pin is driven LOW.

The T-MAU circuitry will always go into power down

mode if RESET is asserted, coma mode is enabled, or

the T-MAU is not selected.

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