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M24C08-R Datasheet(PDF) 28 Page - STMicroelectronics

No. de pieza M24C08-R
Descripción Electrónicos  8-Kbit serial I²C bus EEPROM
PDF  40 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M24C08-R Datasheet(HTML) 28 Page - STMicroelectronics

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DC and AC parameters
M24C08-W M24C08-R M24C08-F
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DocID023924 Rev 3
Table 17. 100 kHz AC characteristics (I2C Standard mode)(1)
1. Values recommended by the I2C bus Standard-mode specification for a robust design of the I2C bus
application. Note that the M24xxx devices decode correctly faster timings as specified in Table 16: 400 kHz
AC characteristics.
Symbol
Alt.
Parameter
Min.
Max.
Unit
fC
fSCL
Clock frequency
-
100
kHz
tCHCL
tHIGH
Clock pulse width high
4
-
µs
tCLCH
tLOW
Clock pulse width low
4.7
-
µs
tXH1XH2
tR
Input signal rise time
-
1
µs
tXL1XL2
tF
Input signal fall time
-
300
ns
tQL1QL2(2)
2. Characterized only.
tF
SDA fall time
-
300
ns
tDXCX
tSU:DAT Data in setup time
250
-
ns
tCLDX
tHD:DAT Data in hold time
0
-
ns
tCLQX(3)
3. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or
rising edge of SDA.
tDH
Data out hold time
200
-
ns
tCLQV(4)
4. tCLQV is the time (from the falling edge of SCL) required by the SDA bus line to reach either 0.3 VCC or
0.7 VCC, assuming that Rbus × Cbus time constant is within the values specified in Figure 12.
tAA
Clock low to next data valid (access time)
-
3450
ns
tCHDL(5)
5. For a reStart condition, or following a Write cycle.
tSU:STA Start condition setup time
4.7
-
µs
tDLCL
tHD:STA Start condition hold time
4
-
µs
tCHDH
tSU:STO Stop condition setup time
4
-
µs
tDHDL
tBUF
Time between Stop condition and next Start
condition
4.7
-
µs
tW
tWR
Write time
-
5
ms
tNS(2)
Pulse width ignored (input filter on SCL and
SDA), single glitch
-
100
ns



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