ZIOL2201 datasheet(17/91 Pages) ETC2

17 / 91 page

ZIOL2xxx – IC Family

IO-Link compliant HV Line Driver IC Family

Data Sheet

January 31, 2012

the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to

changes without notice.

17 of 90

In order to gain optimal EMC behavior the slew rate of the output signals of both drivers can be adjusted. The

input threshold levels of the receiver can be set to ratiometric or to IO-Link conform levels, which enables the IC to

be used in applications having a wide supply voltage range.

The configuration of the transceiver can be changed during operation. After power-on this configuration is

automatically loaded from the on-chip EEPROM.

Driver and receiver are kept totally separated, so full duplex mode in data communication systems is supported.

The ability to enable/disable the drivers output also enables applications in half duplex mode, where output and

input are connected. Having the I/O-pins separated also enables additional external input filtering.

The COM channel send and receive signals (TX_EN, TX, RX) are multiplexed with the signals of the SPI

functional unit of the IC (SPI_CLK, MOSI, MISO) as shown in Figure 3.2. The SPI unit is used for IC configuration

and diagnostic purposes (refer to chapter 3.3.8). As long the SPI unit is active (SPI_EN_L = low), the send status

of the COM channel is kept (for information refer to chapter 3.3.8 and Figure 3.10).

Figure 3.3 ZIOL22xx Transceiver Data Path in Principle

Device

Legend:

AF:

Analog Filter (on/off configurable)

CS:

Current Sink (on/off/strength configurable)

DF:

Digital Filter (on/off configurable)

I1, I2:

Transmit/Receive Data Inverter (on/off configurable)

Data Latch, stores channel transmit status

SPI:

Serial Peripheral Interface

Analog Block

Digital Block

AUX_I

AUX_O

TX_EN/

SPI_CLK

TX/

MOSI

RX/

MISO

COM_O

COM_I

AUX_TX

AUX_EN

AUX_RX

Single channel

transceiver

COM

SPI

SPI_EN_L

CLK

Device

ZIOL22xx Data Path

RST_L

INT_L

WURQ_L

Control

MOSI

MISO

Conf.Reg[7][7:5]

OUT

n.c.

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