AN4471 datasheet(22/39 Pages) STMICROELECTRONICS

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Hardware layout and configuration

AN4471

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DocID026197 Rev 1

goes down and puts all the channels into the HZ state. By externally forcing THSD to a

positive low-voltage supply, the thermal protection is disabled.

• EXPOSED-PAD is internally connected to the substrate. It is accessible on the bottom

side of the board and it is floating. The user can connect a 100 V capacitance to ground

in order to reduce noise during the receiving phase.

More information on the THSD pin is described in Table 18.

The STHV800 output waveforms for each channel Ch 1/2/3/4/5/6/7/8 can be displayed

directly using an oscilloscope by connecting the scope probe to the XDCR_x (with x= 1, …

8) BNC connectors.

The user can also select whether or not to connect the on board equivalent load, a 270 pF

200 V capacitor paralleled with a 100

Ω, 2 W resistor (through J19, J21, J20, J18, J27, J31,

J28, J32 respectively for Channel 1, ... 8). A coaxial cable can also be used to easily

connect the user transducer. Eight low voltage outputs are also available to receive the

transduced echo signal arriving from the piezo-element through the TRswitch (see Table 5)

on the low voltage output BNC (JlCh1, JlCh2, …).

Once the STHV800 performance is appreciated, users can make their own boards. The

main issues to be wary of during the PCB design are the capacitance values to ensure good

filtering and effective decoupling between the low voltage inputs and the HV switching

signals. The best way to ensure this is through layer separation.

3.6

Operating supply conditions

Table 18. STHV800 special pin configuration

Special pins on the PCB demo

Name

Description

Status on board

THSD (pin 29)

Thermal shutdown pin

Active (J24 closed between 1 and 2 - forced

to 3 V through R58 = 10 k

Ω). The user can

monitor the THSD status on TP3 (test point).

Moreover the user can give the control to

FPGA by shorting J24 between 2 and 3

Table 19. DC working supply conditions

Operating supply voltages

Symbol

Parameter

Min.

Typ.

Max.

Unit

VDDP

Positive supply voltage

2.7

3.6

VDDM

Negative supply voltage

- 2.7

- 3

- 3.6

VDD

Positive logic voltage

1.6

3.6

HVP

TX high voltage positive supply

HVP_CW

CW high voltage positive supply

HVM

TX high voltage negative supply

- 95

HVM_CW

CW high voltage negative supply

- 95

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