AS0260CSSC28SUD20 datasheet(12/83 Pages) ONSEMI

12 / 83 page

AS0260 DS Rev. G Pub. 5/15 EN

©Semiconductor Components Industries, LLC, 2015.

AS0260: 1/6-Inch 1080P High-Definition (HD) System-On-A-Chip (SOC) Digi-

tal Image Sensor

A soft reset sequence to the sensor has a similar effect as the hard reset and can be acti-

vated by writing to a register through the two-wire serial interface. On-chip power-on-

reset circuitry can generate an internal reset signal in case an external reset is not

provided. The RESET_BAR signal has an internal pull-up resistor and can be left floating.

Hard Reset

The AS0260 enters the reset state when the external RESET_BAR signal is asserted LOW,

as shown in Figure 5. Parallel data output signals will be in High-Z state.

Figure 5:

Hard Reset Operation

Notes:

1. This delay is dependent on EXTCLK frequency.

2. Assumes that CONFIG/GPIO1 = 1.

CLK_P

Table 4:

Hard Reset

Symbol

Definition

Min

Typ

Max

Unit

RESET_BAR pulse width

–

EXTCLK cycles

Active EXTCLK required after RESET_BAR asserted

–

Active EXTCLK required before RESET_BAR de-asserted

–

Maximum internal boot time1

––

Table 3:

Status of Output Signals During Hard Reset

Signal

Reset

EXTCLK

Reset

RESET_BAR

Mode

Internal Boot Time

SDATA

Enter streaming mode

All Outputs

Data Active

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