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FPD85310 Datasheet(PDF) 13 Page - National Semiconductor (TI) |
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FPD85310 Datasheet(HTML) 13 Page - National Semiconductor (TI) |
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13 / 29 page ![]() Functional Description (Continued) TABLE 2. FPD85310 Programmable Register Definition (Continued) Control Registers EEPROM Address The control registers provide mode setting information to the input and output interfaces. Control Register (5 bits) [0]. Output polarity - defines active high or active low output “0” = normal output (active high) “1” = inverted output (active low) [1]. Toggle circuit enable/disable “0” = Normal GPO output; Toggle circuitry disabled “1” = Toggle circuitry enabled; output transitions after 1 clock (pixel counter) whenever programmed rising edge of GPO occurs. When “toggle circuit” is enable, the value of “Horizontal Duration” register programming determine; “001h” ∼’1 H-line-1’ = 1 H-line toggling, ’1 H-line’∼’2 H-line-1’ = 2 H-line toggling, etc. up to 11 bits are set. [2]. Automatic Frame Size Detection GPO [0:1] “0” = Normal Operation “1” = Used with toggle circuitry to create a “continuous” REV signal. NOTE: The value of the vertical duration register is overwritten. GPO [2:8] “0” = Normal Operation “1” = Early Start capability (Vertical Duration = “00” is N/A, See Table 5) The value in the Vertical Start Register is subtracted from the total number of lines/frame (auto-detected) to determine the Vertical Start position. (It needs a full frame after RSTZ, then started with 1 frame delayed to compare to the other GPOs) [4:3] GPO [0:8] Combination Select* (Two GPOs or multi GPOs) “00” = Select GPO# as programmed. (no combination function) “01” = Select GPO# “ANDed” with GPO#-1 “10” = Select GPO# “ORed” with GPO#-1 “11” = Select GPO# and GPO#-1 on alternating frames (*If the transition of GPO#-1 effect the combined result, it should be delayed 1 OCLK, and GPO0 cannot be programmed by non-existing of “GPO-1”) (Examples) GPO#-1 AND GPO#, (GPO#-2 and GPO#-1) OR GPO# and etc. TABLE 3. EEPROM Memory Map Address Data (# bits) Default Values 0-7F DDC VESA DATA (HEX) 80 programmed to 00H for EEPROM auto detect 00 82,81 gpo [8]_pstart_reg (10) 00,01 84,83 gpo [8]_pcount_reg (11) 02,2D 86,85 gpo [8]_lstart_reg (11) 00,01 88,87 gpo [8]_lcount_reg (11) 03,02 89 gpo [8]_cont_reg (5) 00 8B,8A gpo [7]_pstart_reg (10) 00,14 8D,8C gpo [7]_pcount_reg (11) 01,E0 8F,8E gpo [7]_lstart_reg (11) 00,02 91,90 gpo [7]_lcount_reg (11) 03,00 92 gpo [7]_cont_reg (5) 01 www.national.com 13 |
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