ST7LITE49K2 datasheet(92/245 Pages) STMICROELECTRONICS

No. de pieza	ST7LITE49K2

Descripción Electrónicos	Communication interfaces

PDF	245 Pages

Scroll/Zoom	100%

Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

Página de inicio	http://www.st.com

Logo

92 / 245 page

On-chip peripherals

ST7LITE49K2

92/245

Figure 45.

Block diagram of input capture mode

Figure 46.

Input capture timing diagram

Long range input capture

Pulses that last more than 8 µs can be measured with an accuracy of 4 µs if fOSC equals 8

MHz in the following conditions:

●

The 12-bit AT4 timer is clocked by the Lite timer (RTC pulse: CK[1:0] = 01 in the ATCSR

●

The ICS bit in the ATCSR2 register is set so that the LTIC pin is used to trigger the AT4

timer capture.

●

The signal to be captured is connected to LTIC pin

●

Input Capture registers LTICR, ATICRH and ATICRL are read

This configuration allows to cascade the Lite timer and the 12-bit AT4 timer to get a 20-bit

input capture value. Refer to Figure 47.

ATCSR

CK0

CK1

ICIE

ICF

12-BIT AUTORELOAD REGISTER

12-BIT UPCOUNTER1

fCPU

ATIC

12-BIT INPUT CAPTURE REGISTER

IC INTERRUPT

REQUEST

ATR1

ATICR

CNTR1

(1 ms

fLTIMER

@ 8MHz)

timebase

OFF

32 MHz

COUNTER1

01h

fCOUNTER

xxh

02h

03h

04h

05h

06h

07h

04h

ATIC PIN

ICF FLAG

INTERRUPT

08h

09h

0Ah

INTERRUPT

ATICR READ

09h

ST7LITE49K2 Datasheet(PDF) 92 Page - STMicroelectronics

ST7LITE49K2 Datasheet(HTML) 92 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL