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AM652X Datasheet(PDF) 156 Page - Texas Instruments |
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AM652X Datasheet(HTML) 156 Page - Texas Instruments |
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156 / 299 page  RMII[x]_TXD[1:0], RMII[x]_TXEN (outputs) SPRSP08_CPSW2G_RMIITX RMII6 RMII7 RMII[x]_REFCLK (input) RMII8 RMII4 RMII5 RMII[x]_RXD[1:0] RMII[x]_RXER , RMII[x]_CRS_DV, (inputs) SPRSP08_CPSW2G_RMIIRX RMII[x]_ (input) REFCLK 156 AM6548, AM6528, AM6546 AM6526, AM6527 SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018 www.ti.com Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Specifications Copyright © 2017–2018, Texas Instruments Incorporated Table 5-32. Timing Requirements for RMII[x]_RXD[1:0], RMII[x]_CRS_DV, and RMII[x]_RXER - RMII Mode (continued) NO. PARAMETER DESCRIPTION MIN TYP MAX UNIT RMII5 th(REF_CLK-RXD) Hold time RXD[1:0] valid after REF_CLK 2 ns th(REF_CLK-CRS_DV) Hold time, CRS_DV valid after REF_CLK 2 ns th(REF_CLK-RX_ER) Hold time, RX_ER valid after REF_CLK 2 ns Figure 5-30. RMII[x]_RXD[1:0], RMII[x]_CRS_DV, RMII[x]_RXER Timing - RMII Mode Table 5-33, Table 5-33, and Figure 5-31 present switching characteristics for CPSW2G RMII Transmit. Table 5-33. Switching Characteristics for RMII[x]_TXD[1:0], and RMII[x]_TXEN - RMII Mode NO. PARAMETER DESCRIPTION MIN TYP MAX UNIT RMII6 td(REF_CLK-TXD) Delay time, REF_CLK High to TXD[1:0] valid 2 13 ns td(REF_CLK-TXEN) Delay time, REF_CLK to TXEN valid 2 13 ns RMII7 tr(TXD) Rise Time, TXD Outputs 1 5 ns tr(TX_EN) Rise Time, TX_EN Output 1 5 ns RMII8 tf(TXD) Fall Time, TXD Outputs 1 5 ns tf(TX_EN) Fall Time, TX_EN Output 1 5 ns Figure 5-31. RMII[x]_TXD[1:0], RMII[x]_TXEN Timing - RMII Mode 5.11.5.2.3 CPSW2G RGMII Timings Table 5-34, Table 5-35, and Figure 5-32 present timing requirements for receive RGMII operation. Table 5-34. Timing Requirements for RGMII[x]_RCLK - RGMII Mode NO. PARAMETER DESCRIPTION MODE MIN TYP MAX UNIT RGMII1 tc(RXC) Cycle time, RXC 10Mbps 360 440 ns 100Mbps 36 44 ns 1000Mbps 7.2 8.8 ns |
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