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AM652X Datasheet(PDF) 164 Page - Texas Instruments |
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AM652X Datasheet(HTML) 164 Page - Texas Instruments |
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164 / 299 page  QEP_S QEP4 EPERIPHERALS_TIMNG_03 QEP_I QEP2 QEP_A/B QEP1 QEP3 QEP5 164 AM6548, AM6528, AM6546 AM6526, AM6527 SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018 www.ti.com Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Specifications Copyright © 2017–2018, Texas Instruments Incorporated Table 5-44. Timing Requirements for eQEP NO. PARAMETER DESCRIPTION MIN MAX UNIT QEP1 tw(QEP) Pulse duration, QEP input 3 + 2P(1) ns QEP2 tw(QEPIH) Pulse duration, QEP Index input high 3 + 2P(1) ns QEP3 tw(QEPIL) Pulse duration, QEP Index input low 3 + 2P(1) ns QEP4 tw(QEPSH) Pulse duration, QEP Strobe high 3 + 2P(1) ns QEP5 tw(QEPSL) Pulse duration, QEP Strobe low 3 + 2P(1) ns (1) P = sysclk Figure 5-42. eQEP Input Timings Table 5-45. Switching Characteristics for eQEP NO. PARAMETER DESCRIPTION MIN MAX UNIT QEP6 td(QEP-CNTR) Delay time, external clock to counter increment 24 ns 5.11.5.9 GPIO The device has three instances of GPIO144 modules. The GPIO pins are grouped into banks (16 pins per bank), which means that each GPIO module provides up to 144 dedicated general-purpose pins with input and output capabilities; thus, the general-purpose interface supports up to 432 (3 instances × (9 banks × 16 pins)) pins. Since WKUP_GPIO0_[56:143], GPIO0_[96:143], and GPIO1_[90:143] are reserved in this Device, general purpose interface supports up to 242 pins. For more details about features and additional description information on the device General-Purpose Interface, see the corresponding sections within Section 4.3, Signal Descriptions and Section 6, Detailed Description. NOTE The general-purpose input/output i (i = 0 to 1) is also referred to as GPIOi. Table 5-46 and Table 5-47 present timings and switching characteristics of the GPIO Interface. Table 5-46. GPIO Timing Requirements NO. PARAMETER DESCRIPTION MIN MAX UNIT GP2 tw(GPIO_IN) Minimum Input Pulse Width 3.6 + 2P(1) ns |
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