UPD765B datasheet(5/17 Pages) NEC

5 / 17 page

NEC

uPD765A/uPD765B

DIFFERENCES BETWEEN ,uPD765A AND

uP D765B

The uPD765B is a functionally enhanced version of the

uPD765A.Differences are explained below.

Overrun Bit [OR]

In uPD765A, when executing a read- or write-type

command (except READ ID and SCAN types), the

result status OR bit is not set if there is an overrun on

the final byte of a sector. An improvement in the

uPD765B allows it to set the OR bit in any situation.

DRQ Reset

When an overrun occurs, the uPD765A needs DACK

input to reset DRQ. If DACK is not available, an

external DMA controller continues to operate even after

the FDC enters the R-Phase (Result Phase), and stored

result status may be transferred accidentally as ordinary

data.

On the other hand, the uPD765B resets DRQ auto-

matically

just before the R-Phaseentry and independent

of the DACK input. See AC Characteristics for DRQ

reset

timing.

Clock

Synchronization

The

uPD765B

does

not

require

synchronization

between the CLK and WCLK inputs.

Version

Command

The Version command distinguishes the uPD765B

from other devices. The ST0 response to the Version

command is:

Part No.

ST0 Value

uPD765A

80H

uPD765B

90H

5-7

UPD765B Datasheet(PDF) 5 Page - NEC

UPD765B Datasheet(HTML) 5 Page - NEC

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

Datasheet Descarga

Enlace URL