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STM32F103XC Datasheet(PDF) 70 Page - STMicroelectronics

No. de pieza STM32F103XC
Descripción Electrónicos  High-density performance line Arm®-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces
PDF  143 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F103XC Datasheet(HTML) 70 Page - STMicroelectronics

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Electrical characteristics
STM32F103xC, STM32F103xD, STM32F103xE
70/143
DS5792 Rev 13
Figure 27. Asynchronous multiplexed PSRAM/NOR write waveforms
Table 34. Asynchronous multiplexed PSRAM/NOR write timings(1)(2)
1. CL = 15 pF.
2. BGuaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
5tHCLK – 1
5tHCLK + 2 ns
tv(NWE_NE)
FSMC_NEx low to FSMC_NWE low
2tHCLK
2tHCLK + 1
ns
tw(NWE)
FSMC_NWE low time
2tHCLK – 1
2tHCLK + 2
ns
th(NE_NWE)
FSMC_NWE high to FSMC_NE high hold time
tHCLK – 1
-
ns
tv(A_NE)
FSMC_NEx low to FSMC_A valid
-
7
ns
tv(NADV_NE) FSMC_NEx low to FSMC_NADV low
3
5
ns
tw(NADV)
FSMC_NADV low time
tHCLK – 1
tHCLK + 1
ns
th(AD_NADV)
FSMC_AD (address) valid hold time after
FSMC_NADV high
tHCLK – 3
-
ns
th(A_NWE)
Address hold time after FSMC_NWE high
4tHCLK
-ns
tv(BL_NE)
FSMC_NEx low to FSMC_BL valid
-
1.6
ns
th(BL_NWE)
FSMC_BL hold time after FSMC_NWE high
tHCLK – 1.5
-
ns
tv(Data_NADV) FSMC_NADV high to Data valid
-
tHCLK + 1.5 ns
th(Data_NWE) Data hold time after FSMC_NWE high
tHCLK – 5
-
ns



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