LTM4652 datasheet(14/38 Pages) AD

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LTM4652

Rev. 0

For more information www.analog.com

The typical LTM4652 application circuit is shown in

Figure 31. External component selection is primarily

determined by the maximum load current and output

voltage. Refer to Table 6 for specific external capacitor

requirements for a 25% or a 50% load step application.

Output Total DC Accuracy and AC Transient

Performance

In modern ASIC and FPGA power supply designs, a tight

total voltage regulation window, ±3% for example, is

required of the supply powering the core and periphery. To

meet this requirement, the supply’s DC voltage variance

plus any AC voltage variation which may occur during any

load step transient must fall within this allowed window.

The DC voltage variance is determined by the accuracies

of the supply’s reference voltage, resistor divider, load

regulation and line regulation over the operating tempera-

ture range. The AC voltage variance is determined by the

supply’s output voltage overshoot and undershoots in

response to a load transient condition for a given output

capacitor network.

Figure 2 shows a typical load step transient response

waveform together with DC voltage accuracy variance. For

a given allowable voltage regulation window, a tighter DC

voltage accuracy allows more margin for the AC variation

due to a load transient response. This increased margin

for AC variation allows for a reduction in the total out-

put capacitance required to meet the regulation window

requirement. This allows for a reduced total solution cost

and footprint area.

APPLICATIONS INFORMATION

Figure 2. Typical Load Step Transient Response with

DC Voltage Accuracy Variance

Figure 3. Overall Output Capacitor vs Total

DC Accuracy

ALLOWABLE

REGULATION

WINDOW

DC ACCURACY

LOAD STEP

AC OVERSHOOT

AC UNDERSHOOT

4652 F02

TOTAL DC ACCURACY (%)

9000

8000

6000

4000

2000

7000

5000

3000

1000

0.8

1.2

4652 F03

1.5

2.0

1.0

3700

8000

4000

4500

5400

For example, in an FPGA core voltage application, for a 12V

input, 1.0V output at 100A design, a total overall ±3% total

voltage regulation window is required in responding to a

25% load step transient. Figure 3 illustrates the benefit of

overall output capacitor reduction versus improved total

DC accuracy by using 100µF ceramic output capacitors.

VIN to VOUT Step-Down Ratios

There are restrictions in the maximum VIN and VOUT step-

down ratio that can be achieved for a given input voltage.

Each output of the LTM4652 is capable of 98% duty cycle,

but the VIN to VOUT minimum dropout is still shown as a

function of its load current and will limit output current

capability related to high duty cycle on the top side switch.

Minimum on-time tON(MIN) is another consideration in

operating at a specified duty cycle while operating at a

certain frequency due to the fact that tON(MIN) < D/fSW,

where D is duty cycle and fSW is the switching frequency.

tON(MIN) is specified in the electrical parameters as 90ns.

Output Voltage Programming

The PWM controller has an internal 0.6V reference voltage.

As shown in the Figure 1 (Simplified Block Diagram), a

60.4k internal feedback resistor connects between the

VOUTS1 to VFB1 and VOUTS2 to VFB2. It is very important

that these pins be connected to their respective outputs

for proper feedback regulation. Overvoltage can occur if

these VOUTS1 and VOUTS2 pins are left floating when used

as individual regulators, or at least one of them is used

LTM4652 Datasheet(PDF) 14 Page - Analog Devices

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