STM32H7B3AI datasheet(107/238 Pages) STMICROELECTRONICS

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Figure 30. High-speed external clock source AC timing diagram

OS C _IN

External

STM32

clock source

VHSEH

tf(HSE)

tW(HSE)

90 %

10 %

THSE

tr(HSE)

tW(HSE)

fHSE_ext

VHSEL

Low-speed external user clock generated from an external source

In bypass mode, the LSE oscillator is switched off and the input pin is a standard I/O. The external clock

signal has to respect Table 48. Low-speed external user clock characteristics in addition to Table 65. I/O static

characteristics. The external clock can be low-swing (analog) or digital. In case of a low-swing analog input clock,

the clock squarer must be activated (refer to RM0455).

Table 48. Low-speed external user clock characteristics

Symbol

Parameter

Conditions

Min(1)

Typ(1)

Max(1)

Unit

fLSE_ext

User external clock source frequency

External digital/analog clock

32.768

1000

kHz

VLSEH

Digital OSC32_IN input high-level voltage

External digital clock

0.7 VDD

VDD

VLSEL

OSC32_IN input low-level voltage

VSS

0.3 VDD

tw(LSEH)/ tw(LSEL)

OSC32_IN high or low time

External digital clock

250

Vlsw_H

Analog low-swing OSC_IN high-level voltage

External analog low-swing clock

0.6

1.225

Vlsw_L

Analog low-swing OSC_IN low-level voltage

0.35

0.8

VlswLSE (VLSEH−VLSEL)

Analog low-swing OSC_IN peak-to-peak

amplitude

0.2

0.875

DuCyLSE

Analog low-swing OSC_IN duty cycle

tr(LSE)/tf(LSE)

Analog low-swing OSC_IN rise and fall times

External analog low-swing clock,

10% to 90%

100

200

1. Guaranteed by design.

Note:

For information on selecting the crystal, refer to the application note AN2867 “Oscillator design guide for ST

microcontrollers” available from the ST website www.st.com.

STM32H7B3xI

Operating conditions

DS13139 - Rev 8

page 107/238

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