STM32H7B3AI datasheet(225/238 Pages) STMICROELECTRONICS

225 / 238 page

Date

Revision

Changes

Updated Figure 21. Power supply scheme. Added note to VREFINT in

Table 30. Embedded reference voltage.Added Table 33. Inrush current

and inrush electric charge characteristics for LDO and SMPS. Updated

Table 46. Low-power mode wakeup timings, Table 34. Typical and maximum

current consumption in Run mode, code with data processing running from ITCM,

regulator ON and Table 35. Typical and maximum current consumption in Run

mode, code with data processing running from flash memory, cache ON.

Updated Table 68. Output timing characteristics (HSLV OFF) and

Table 69. Output timing characteristics (HSLV ON).

Updated Table 62. ESD absolute maximum ratings.

Added notes related to performance degradation at VOS1 in Section 6.3.18 FMC

characteristics, Section 6.3.19 Octo-SPI interface characteristics,

Section 6.3.32 PSSI interface characteristics, Section 6.3.33 LCD-TFT controller

(LTDC) characteristics, Section 6.3.36.2 USART interface characteristics,

Section 6.3.36.3 SPI interface characteristics, Section 6.3.36.4 I2S Interface

characteristics, Section 6.3.36.5 SAI characteristics, Section 6.3.36.6 MDIO

characteristics, Section 6.3.36.7 SD/SDIO MMC card host interface

(SDMMC) characteristics, Section 6.3.36.9 USB OTG_HS characteristics

and Section 6.3.36.10 JTAG/SWD interface characteristics. Updated F(CLK)

measurement conditions in Table 90. OCTOSPI characteristics in SDR mode

and Table 91. OCTOSPI characteristics in DTR mode (with DQS)/Octal and

Hyperbus.

Added Figure 54. ADC conversion timing diagram.

Added Section 6.3.32 PSSI interface characteristics.

Updated Figure 66. USART timing diagram in Master mode and

Figure 67. USART timing diagram in Slave mode.

Added note related to ULPI transceivers operating at 1.8 V in

Table 125. Dynamics characteristics: USB ULPI.

21-Aug-2020

In Section 3.31 True random number generator (RNG), changed "random

number generator" in "true random number generator" and description updated.

In Section 5 Pin descriptions, swapped PA1 and PA2 balls in WLCSP132 ballout

schematic.

Added reference to application note AN4899 in Section 6.3.16 I/O port

characteristics.

Updated DuCyCKOUT in Table 108. DFSDM measured timing 1.62-3.6 V

Updated .

16-Sep-2020

Updated VDDMMC separate supply pad in Section 2 Description. Changed pin

88 connection to VDD in Figure LQFP100 (STM32H7B3xI with SMPS) pinout and

Table 7. STM32H7B3xI pin/ball definition. Changed VDD_MMC_4 into VDDMMC

in Table 7. STM32H7B3xI pin/ball definition.

Updated Figure 21. Power supply scheme and Section 6.3.2 VCAP external

capacitor.

Added VBAT in Section 6.3.1 General operating conditions.

Updated High-speed external user clock generated from an external source and

Low-speed external user clock generated from an external source.

Updated .

28-Sep-2020

Updated VHSEL maximum value in Table 47. High-speed external user clock

characteristics.

04-May-2021

Added indication that patents apply to the devices in Section Features.

Added reference to errata sheet in Section 1 Introduction.

Updated WKUP signals in Figure 1. STM32H7B3xI block diagram and in

Table 7. STM32H7B3xI pin/ball definition.

Updated Section 3.40 Serial peripheral interfaces (SPI)/integrated interchip

sound interfaces (I2S).

Added note to TRIM parameter in Table 52. HSI oscillator characteristics.

STM32H7B3xI

DS13139 - Rev 8

page 225/238

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