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MSC7119 Datasheet(PDF) 44 Page - Freescale Semiconductor, Inc |
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MSC7119 Datasheet(HTML) 44 Page - Freescale Semiconductor, Inc |
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44 / 56 page ![]() MSC7119 10/100 Mbps Ethernet MAC Data Sheet, Rev. 6 Hardware Design Considerations Freescale Semiconductor 44 • Power consumption. You can reduce power consumption in your design by controlling the power consumption of the following regions of the device: — Extended core. Use the SC1400 Stop and Wait modes by issuing a stop or wait instruction. — Clock synthesis module. Disable the PLL, timer, watchdog, or DDR clocks or disable the CLKO pin. — AHB subsystem. Freeze or shut down the AHB subsystem using the GPSCTL[XBR_HRQ] bit. — Peripheral subsystem. Halt the individual on-device peripherals such as the DDR memory controller, Ethernet MAC, HDI16, TDM, UART, I2C, and timer modules. For details, see the “Clocks and Power Management” chapter of the MSC711x Reference Manual. • Power supply design. One of the most common ways to derive power is to use either a simple fixed or adjustable linear regulator. For the system I/O voltage supply, a simple fixed 3.3 V supply can be used. However, a separate adjustable linear regulator supply for the core voltage VDDC should be implemented. For the memory power supply, regulators are available that take care of all DDR power requirements. 3.3 Estimated Power Usage Calculations The following equations permit estimated power usage to be calculated for individual design conditions. Overall power is derived by totaling the power used by each of the major subsystems: PTOTAL = PCORE + PPERIPHERALS + PDDRIO + PIO + PLEAKAGE Eqn. 3 This equation combines dynamic and static power. Dynamic power is determined using the generic equation: C × V2 × F × 10–3 mW Eqn. 4 where, C = load capacitance in pF V = peak-to-peak voltage swing in V F = frequency in MHz 3.3.1 Core Power Estimation of core power is straightforward. It uses the generic dynamic power equation and assumes that the core load capacitance is 750 pF, core voltage swing is 1.2 V, and the core frequency is 300 MHz. This yields: PCORE = 750 pF × (1.2 V) 2 × 300 MHz × 10–3 = 324.0 mW Eqn. 5 This equation allows for adjustments to voltage and frequency if necessary. Table 33. Recommended Power Supply Ratings Supply Symbol Nominal Voltage Current Rating Core VDDC 1.2 V 1.5 A per device Memory VDDM 2.5 V 0.5 A per device Reference VREF 1.25 V 10 µA per device I/O VDDIO 3.3 V 1.0 A per device |
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