7.2.2.1 Input Filter Design

Place a RC filter in front of the device to improve signal-to-noise performance of the signal path. Input noise

with a frequency close to the ΔΣ modulator sampling frequency (typically 10MHz) is folded back into the

low-frequency range by the modulator. The purpose of the RC filter is to attenuate high-frequency noise below

the desired noise level of the measurement. In practice, a cutoff frequency that is two orders of magnitude lower

than the modulator frequency yields good results.

Most voltage-sensing applications use high-impedance resistive dividers in front of the isolated modulator to

scale down the input voltage. In this case, a single capacitor, as shown in Figure 7-2, is sufficient to filter the

input signal. For R1 >> RSNS, the cut-off frequency of the input filter is 1 / (2 x π x RSNS x C5). For example,

RSNS =10kΩ and C5 = 100pF results in a cutoff frequency of 160kHz.

C5

RSNS

R1

V

AC

AVDD

AGND

INP

SNSN

Figure 7-2. Input Filter

7.2.2.2 Bitstream Filtering

The modulator generates a bitstream that is processed by a digital filter to obtain a digital word similar to a

conversion result of a conventional analog-to-digital converter (ADC). Equation 2 represents a sinc3-type filter,

which is a very simple filter that is built with minimal effort and hardware.

(2)

This filter provides the best output performance at the lowest hardware size (count of digital gates) for a second-

order modulator. All characterization in this document is also done with a sinc3 filter with an oversampling ratio

(OSR) of 256 and an output word width of 16 bits.

An example code for implementing a sinc3 filter in an FPGA is discussed in the Combining the ADS1202 with

an FPGA Digital Filter for Current Measurement in Motor Control Applications application note, available for

download at www.ti.com.

For modulator output bitstream filtering, a device from TI's C2000 or Sitara microcontroller families is

recommended. These families support multichannel dedicated hardwired filter structures that significantly

simplify system level design by offering two filtering paths per channel: one path provides high-accuracy results

for the control loop and the other provides a fast-response path for overcurrent detection.

A delta sigma modulator filter calculator is available for download at www.ti.com that aids in the filter design and

selecting the right OSR and filter order to achieve the desired output resolution and filter response time.

www.ti.com

AMC0136

SBASAZ0A – AUGUST 2024 – REVISED DECEMBER 2024

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