STM32H523VCY7 datasheet(45/228 Pages) STMICROELECTRONICS

45 / 228 page

DS14540 Rev 1

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STM32H523xx

Functional overview

•

16-bit up counter with 16-bit autoreload register

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3-bit prescaler with eight possible dividing factors (1, 2, 4, 8, 16, 32, 64, 128)

•

Selectable clock

–

Internal clock sources: LSE, LSI, HSI or APB clock

–

External clock source over LPTIM input (working with no LP oscillator running,

used by Pulse Counter application)

•

16-bit ARR autoreload register

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16-bit capture/compare register

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Continuous/One-shot mode

•

Selectable software/hardware input trigger

•

Programmable digital glitch filter

•

Configurable output: pulse, PWM

•

Configurable I/O polarity

•

Encoder mode

•

Repetition counter

•

Up to two independent channels for:

–

Input capture

–

PWM generation (edge-aligned mode)

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One-pulse mode output

•

Interrupt generation on ten events

•

DMA request generation on the following events:

–

Update event

–

Input capture

3.31.5

Independent watchdog (IWDG)

The independent watchdog is based on a 12-bit downcounter and an 8-bit prescaler. It is

clocked from an independent 32 kHz internal RC (LSI) and, as it operates independently

from the main clock, it can operate in Stop and Standby modes. It can be used either as a

watchdog to reset the device when a problem occurs, or as a free running timer for

application timeout management. It is hardware or software configurable through the option

bytes. The counter can be frozen in Debug mode.

3.31.6

Window watchdog (WWDG)

The window watchdog is based on a 7-bit downcounter that can be set as free running. It

can be used as a watchdog to reset the device when a problem occurs. It is clocked from

the main clock. It has an early warning interrupt capability and the counter can be frozen in

Debug mode.

3.31.7

SysTick timer

The Cortex-M33 with TrustZone embeds two SysTick timers.

When TrustZone is activated, two SysTick timer are available:

•

SysTick, secure instance

•

SysTick, non-secure instance

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