STM32H523VCY7 datasheet(35/228 Pages) STMICROELECTRONICS

35 / 228 page

DS14540 Rev 1

35/228

STM32H523xx

Functional overview

3.17

Interrupts and events

3.17.1

Nested vectored interrupt controller (NVIC)

The devices embed a nested vectored interrupt controller able to manage 16 priority levels

and to handle up to 125 maskable interrupt channels plus the 16 interrupt lines of the

Cortex-M33.

The NVIC benefits are the following:

•

closely coupled NVIC giving low-latency interrupt processing

•

interrupt entry vector table address passed directly to the core

•

early processing of interrupts

•

processing of late arriving higher priority interrupts

•

support for tail chaining

•

processor state automatically saved

•

interrupt entry restored on interrupt exit with no instruction overhead

•

TrustZone support: NVIC registers banked across secure and non-secure states

The NVIC hardware block provides flexible interrupt management features with minimal

interrupt latency.

3.17.2

Extended interrupt/event controller (EXTI)

The extended interrupts and event controller (EXTI) manages the individual CPU and

system wake-up through configurable event inputs. It provides wake-up requests to the

power control, and generates an interrupt request to the CPU NVIC and events to the CPU

event input. For the CPU an additional event generation block (EVG) is needed to generate

the CPU event signal.

The EXTI wake-up requests allow the system to be woken up from Stop modes.

The interrupt request and event request generation can also be used in Run modes. The

EXTI also includes the EXTI multiplexer IO port selection.

The EXTI main features are the following:

•

All event inputs allowed to wake up the system

•

Configurable events (signals from I/Os or peripherals able to generate a pulse)

–

Selectable active trigger edge

–

Interrupt pending status register bit independent for the rising and falling edge

–

Individual interrupt and event generation mask, used for conditioning the CPU

wake-up, interrupt and event generation

–

Software trigger possibility

•

TrustZone secure events

–

The access to control and configuration bits of secure input events can be made

secure

•

EXTI IO port selection

STM32H523VCY7 Datasheet(PDF) 35 Page - STMicroelectronics

STM32H523VCY7 Datasheet(HTML) 35 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL