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MPC5634MF0MLQA4 Datasheet(PDF) 84 Page - Freescale Semiconductor, Inc

No. de pieza MPC5634MF0MLQA4
Descripción Electrónicos  microcontroller units (MCUs)
PDF  118 Pages
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Fabricante Electrónico  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC5634MF0MLQA4 Datasheet(HTML) 84 Page - Freescale Semiconductor, Inc

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MPC5634M Microcontroller Data Sheet, Rev. 4
Preliminary—Subject to Change Without Notice
Electrical characteristics
Freescale Semiconductor
84
3.13
Platform flash controller electrical characteristics
GAINVGA2
CC
Variable gain amplifier accuracy (gain=2)9
CC
P
INL
8 MHz ADC
–5
5
Counts
CC
P
16 MHz ADC
–8
8
Counts
CC
P
DNL
8 MHz ADC
–3
3
Counts
CC
P
16 MHz ADC
–3
3
Counts
GAINVGA4
CC
Variable gain amplifier accuracy (gain=4)9
CC
P
INL
8 MHz ADC
–7
7
Counts
CC
P
16 MHz ADC
–8
8
Counts
CC
P
DNL
8 MHz ADC
–4
4
Counts
CC
P
16 MHz ADC
–4
4
Counts
1 Stop mode recovery time is the time from the setting of either of the enable bits in the ADC Control Register to the
time that the ADC is ready to perform conversions.Delay from power up to full accuracy = 8 ms.
2 At V
RH – VRL = 5.12 V, one count = 1.25 mV. Without using pregain.
3 Below disruptive current conditions, the channel being stressed has conversion values of 0x3FF for analog inputs
greater then VRH and 0x0 for values less then VRL. Other channels are not affected by non-disruptive conditions.
4 Exceeding limit may cause conversion error on stressed channels and on unstressed channels. Transitions within the
limit do not affect device reliability or cause permanent damage.
5 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values using VPOSCLAMP = VDDA + 0.5 V and VNEGCLAMP = – 0.3 V, then use the larger of the
calculated values.
6 Condition applies to two adjacent pins at injection limits.
7 Performance expected with production silicon.
8 All channels have same 10 k
Ω < Rs < 100 kΩ; Channel under test has Rs=10 kΩ; I
INJ=IINJMAX,IINJMIN
9 Variable gain is controlled by setting the PRE_GAIN bits in the ADC_ACR1-8 registers to select a gain factor of
×1,
×2, or ×4. Settings are for differential input only. Tested at ×1 gain. Values for other settings are guaranteed by as
indicated.
10 At V
RH – VRL = 5.12 V, one LSB = 1.25 mV.
11 Guaranteed 10-bit mono tonicity.
Table 27. APC, RWSC, WWSC settings vs. frequency of operation1
1 Illegal combinations exist, all entries must be taken from the same row
Target Max Frequency
(MHz)
APC2
RWSC2
WWSC
30
000
000
01
60
001
001
01
80
010
010
01
All
111
111
11
Table 26. eQADC conversion specifications (operating) (continued)
Symbol
C
Parameter
Value
Unit
min
max



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