PC8477B datasheet(7/54 Pages) NSC

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20 Pin Description (Continued)

Symbol

PLCC

PQFP

Function

HDSEL

Head Select

This output determines which side of the disk drive is accessed Active selects side

1 inactive selects side 0

HIFIL

(Note 1)

High Filter

No connect No external capacitor is required An external capacitor can be

connected but it will have no effect on the data separator performance

IDENT

Identity

During chip reset the IDENT and MFM pins are sampled to determine the mode of

operation according to the following table

IDENT

MFM

Mode

1 or NC

PC-AT Mode

Illegal

1 or NC

PS2 Mode

Model 30 Mode

AT Mode

The DMA enable bit in the DOR is valid TC is active high Status Registers A and B

are disabled (TRI-STATE )

Model 30 Mode

The DMA enable bit in the DOR is valid TC is active high Status Registers A

and B are enabled

PS2 Mode

The DMA enable bit in the DOR is a don’t care and the DRQ and INT signals will

always be enabled TC is active low Status Registers A and B are enabled

After chip reset the state of IDENT determines the polarity of the DENSEL output

When IDENT is a logic ‘‘1’’ DENSEL is active high for 500 kbs and 1 Mbs data rates

When IDENT is a logic ‘‘0’’ DENSEL is active low for 500 kbs and 1 Mbs data rates

(See Mode command for further explanation of DENSEL)

INDEX

Index

This input signals the beginning of a track

INT

Interrupt

Active high output to signal the completion of the execution phase for certain

commands Also used to signal when a data transfer is ready during a Non-DMA operation When

in PC-AT or Model 30 mode this signal is enabled by bit D3 of the DOR When in PS2 mode INT

is always enabled and bit D3 of the DOR is reserved

INVERT

Invert

Determines the polarity of all disk interface signals When tied low the internal disk output

buffers and inverting Schmitt input receivers are enabled and the disk interface signals are active

low When tied high the disk interface signals are active high and external receivers and output

buffers are required

LOFIL

(Note 1)

Low Filter

No connect No external capacitor is required An external capacitor can be

connected but it will have no effect on the data separator performance

MFM

IO MFM During a chip reset when in PS2 mode (IDENT low) this pin is sampled to select the PS2

mode (MFM high) or the Model 30 mode (MFM low) An internal pull-up or external pull-down

10 kX resistor will select between the two PS2 modes When the PC-AT mode is desired (IDENT

high) MFM should be left pulled high internally MFM reflects the current data encoding format

when RESET is inactive MFM e high FM e low Defaults to low after a chip reset This signal

can also be configured as the PUMP data separator diagnostic output via the Mode command (see

Section 426)

MTR0

Motor Select 0 – 3

These are the motor enable lines for drives 0 – 3 and are controlled by bits D7 –

D4 of the Digital Output register

MTR1

MTR2

MTR3

(Note 1)

No Connect

These pins must be left unconnected

PC8477B Datasheet(PDF) 7 Page - National Semiconductor (TI)

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