TNETV1644ZDU6 datasheet(122/306 Pages) TI1

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3.7.3.8 Timer0 Block

TMS320DM6437

Digital Media Processor

SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008

www.ti.com

This block of 2 pins consists of Timer0, McBSP0, McBSP1, and GPIO muxed pins. The

PINMUX1.TIM0BK register field selects the pin functions in the Timer0 Block.

Table 3-31 summarizes the 2 pins in the Timer0 Block, the multiplexed function on each pin, and the

PINMUX configurations to select the corresponding function.

Table 3-31. Timer0 Block Muxed Pins Selection

MULTIPLEXED FUNCTIONS

SIGNAL

McBSP

Timer0

GPIO

NAME

FUNCTION

SELECT

FUNCTION

SELECT

FUNCTION

SELECT

CLKS1/

TINP0L/

CLKS1

TIM0BK = 10

TINP0L

TIM0BK = 01/11

GP[98]

TIM0BK = 00

CLKS0/

TOUT0L/

CLKS0

TIM0BK = 10/11

TOUT0L

TIM0BK = 01

GP[97]

As discussed in Section 3.7.3.2, Peripherals Spanning Multiple Pin Mux Blocks, the McBSP0 pins span

across two Pin Mux Blocks: Serial Port Sub-Block0, and Timer0 Block. For proper McBSP0 operation, the

Serial Port Sub-Block0 must be programmed to select McBSP0 function. The McBSP0 CLKS0 pin in the

Timer0 Block is optional for McBSP0 operation. CLKS0 is only needed if you desire using CLKS0 as an

external clock source to the McBSP0 internal sample rate generator.

Similarly, as discussed in Section 3.7.3.2, Peripherals Spanning Multiple Pin Mux Blocks, the McBSP1

pins span across two Pin Mux Blocks: Serial Port Sub-Block1, and Timer0 Block. For proper McBSP1

operation, the Serial Port Sub-Block1 must be programmed to select McBSP1 function. The McBSP1

CLKS1 pin in the Timer0 Block is optional for McBSP1 operation. CLKS1 is only needed if you desire

using CLKS1 as an external clock source to the McBSP1 internal sample rate generator.

Table 3-32 provides a different view of the Timer0 Block pin muxing, showing the Timer0 Block function

based on PINMUX1.TIM0BK setting. The selection options are also shown pictorially in Figure 3-11.

Table 3-32. Timer0 Block Function Selection

PINMUX1.TIM0BK

BLOCK FUNCTION

RESULTING PIN FUNCTIONS

GPIO (2) (default)

GPIO: GP[98:97]

Timer0

Timer0: TINP0L, TOUT0L

McBSP0 External Clock Source,

McBSP0: CLKS0

McBSP1 External Clock Source

McBSP1: CLKS1

McBSP0 External Clock Source,

McBSP0: CLKS0

Timer0 Input

Timer0: TINP0L

In addition, the VDD3P3V_PWDN.TIMER0 field determines the power state of the Timer0 Block pins. The

Timer0 Block pins default to powered down and not operational. To use these pins, user must first

program

VDD3P3V_PWDN.TIMER0

power

the

pins.

For

details

the

VDD3P3V_PWDN.TIMER0 field, see Section 3.2, Power Considerations.

Device Configurations

122

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