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AT89C51ED2-RDTIM Datasheet(PDF) 72 Page - ATMEL Corporation

No. de pieza AT89C51ED2-RDTIM
Descripción Electrónicos  8-bit Flash Microcontroller
PDF  137 Pages
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Fabricante Electrónico  ATMEL [ATMEL Corporation]
Página de inicio  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT89C51ED2-RDTIM Datasheet(HTML) 72 Page - ATMEL Corporation

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AT89C51RD2/ED2
4235E–8051–04/04
Reset Value = 00X0 XXXXb
Not Bit addressable
Serial Peripheral DATa Register
(SPDAT)
The Serial Peripheral Data Register (Table 50) is a read/write buffer for the receive data
register. A write to SPDAT places data directly into the shift register. No transmit buffer is
available in this model.
A Read of the SPDAT returns the value located in the receive buffer and not the content
of the shift register.
Table 50. SPDAT Register
SPDAT - Serial Peripheral Data Register (0C5H)
Reset Value = Indeterminate
R7:R0: Receive data bits
SPCON, SPSTA and SPDAT registers may be read and written at any time while there
is no on-going exchange. However, special care should be taken when writing to them
while a transmission is on-going:
•
Do not change SPR2, SPR1 and SPR0
•
Do not change CPHA and CPOL
•
Do not change MSTR
•
Clearing SPEN would immediately disable the peripheral
•
Writing to the SPDAT will cause an overflow.
1-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
0-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Bit
Number
Bit
Mnemonic Description
76
54
32
1
0
R7
R6
R5
R4
R3
R2
R1
R0



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