AT89C51ED2-RDTIM datasheet(29/137 Pages) ATMEL

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AT89C51RD2/ED2

4235E–8051–04/04

Power Monitor

The POR/PFD function monitors the internal power-supply of the CPU core memories

and the peripherals, and if needed, suspends their activity when the internal power sup-

ply falls below a safety threshold. This is achieved by applying an internal reset to them.

By gen erating the Re se t the Power M oni to r i nsures a correct start up whe n

AT89C51RD2/ED2 is powered up.

Description

In order to startup and maintain the microcontroller in correct operating mode, VCC has

to be stabilized in the VCC operating range and the oscillator has to be stabilized with a

nominal amplitude compatible with logic level VIH/VIL.

These parameters are controlled during the three phases: power-up, normal operation

and power going down. See Figure 12.

Figure 12. Power Monitor Block Diagram

Note:

1. Once XTAL1 High and low levels reach above and below VIH/VIL. a 1024 clock

period delay will extend the reset coming from the Power Fail Detect. If the power

falls below the Power Fail Detect threshold level, the Reset will be applied

immediately.

The Voltage regulator generates a regulated internal supply for the CPU core the mem-

ories and the peripherals. Spikes on the external Vcc are smoothed by the voltage

regulator.

VCC

Power On Reset

Power Fail Detect

Voltage Regulator

XTAL1

(1)

CPU core

Memories

Peripherals

Regulated

Supply

RST pin

Hardware

Watchdog

PCA

Watchdog

Internal Reset

AT89C51ED2-RDTIM Datasheet(PDF) 29 Page - ATMEL Corporation