XRT83SL34 datasheet(38/80 Pages) EXAR

38 / 80 page

XRT83SL34

QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

REV. P1.0.8

PRELIMINARY

PATTERN TRANSMIT AND DETECT FUNCTION

Several test and diagnostic patterns can be generated and detected by the chip. In Hardware mode each

channel can be independently programmed to transmit an All Ones pattern by applying a “High” level to the

corresponding TAOS_n pin. In Host mode, the three interface bits TXTEST[2:0] control the pattern generation

and detection independently for each channel according to Table 12.

TRANSMIT ALL ONES (TAOS)

This feature is available in both Hardware and Host modes. With the TAOS_n pin connected to a “High” level

or when interface bits TXTEST2=“1”, TXTEST1=“0” and TXTEST0=“1” the transmitter ignores input from

TPOS_n/TDATA_n and TNEG_n/CODES_n pins and sends a continuous AMI encoded all “Ones” signal to the

line, using TCLK_n clock as the reference. In addition, when the Hardware pin and interface bit ATAOS is

activated, the chip will automatically transmit the All “Ones” data from any channel that detects an RLOS

condition. This feature is not available on a per channel basis. TCLK_n must NOT be tied “Low”.

NETWORK LOOP CODE DETECTION AND TRANSMISSION

This feature is available in Host mode only. When the interface bits TXTEST2=”1”, TXTEST1=”1” and

TXTEST0=”0” the chip is enabled to transmit the “00001” Network Loop-Up Code from the selected channel

requesting a Loop-Back condition from the remote terminal. Simultaneously setting the interface bits

NLCDE1=”0” and NLCDE0=”1” enables the Network Loop-Up code detection in the receiver. If the “00001”

Network Loop-Up code is detected in the receive data for longer than 5 seconds, the NLCD bit in the interface

own transmitted data. When the interface bits TXTEST2=”1”, TXTEST1=”1” and TXTEST0=”1” the chip is

enabled to transmit the Network Loop-Down Code (TLDC) “001” from the selected channel requesting the

remote terminal the removal of the Loop-Back condition.

In the Host mode each channel is capable of monitoring the contents of the receive data for the presence of

Loop-Up or Loop-Down code from the remote terminal. In the Host mode the two interface bits NLCDE[1:0]

control the Loop-Code detection independently for each channel according to Table 13.

Setting the interface bits to NLCDE1=”0” and NLCDE0=”1” activates the detection of the Loop-Up code in the

receive data. If the “00001” Network Loop-Up code is detected in the receive data for longer than 5 seconds,

the NLCD interface bit is set to “1” and stays in this state for as long as the receiver continues to receive the

TABLE 12: PATTERN TRANSMISSION CONTROL

TXTEST2

TXTEST1

TXTEST0

TEST PATTERN

None

TDQRSS

TAOS

TLUC

TLDC

TABLE 13: LOOP-CODE DETECTION CONTROL

NLCDE1

NLCDE0

CONDITION

Disable Loop-Code Detection

Detect Loop-Up Code in Receive Data

Detect Loop-Down Code in Receive Data

Automatic Loop-Code detection and Remote Loop-Back Activation

XRT83SL34 Datasheet(PDF) 38 Page - Exar Corporation

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