XRT83SL34 datasheet(60/80 Pages) EXAR

60 / 80 page

XRT83SL34

QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

REV. P1.0.8

PRELIMINARY

TABLE 27: MICROPROCESSOR REGISTER #8, BIT DESCRIPTION

0001000

0011000

0101000

0111000

CHANNEL_n

CHANNEL_0

CHANNEL_1

CHANNEL_2

CHANNEL_3

FUNCTION

TYPE

RESET

VALUE

BIT #NAME

Reserved

R/W

D6-D0

B6S1_n -

B0S1_n

Arbitrary Transmit Pulse Shape, Segment 1:The shape of

each channel’s transmitted pulse can be made independently

user programmable by selecting “Arbitrary Pulse” mode in

Table 5. The arbitrary pulse is divided into eight time seg-

ments whose combined duration is equal to one period of

MCLK.

This 7 bit number represents the amplitude of the nth chan-

nel's arbitrary pulse during the first time segment. B6S1_n-

B0S1_n is in signed magnitude format with B6S1_n as the

sign bit and B0S1_n as the least significant bit (LSB).

R/W

TABLE 28: MICROPROCESSOR REGISTER #9, BIT DESCRIPTION

0001001

0011001

0101001

0111001

CHANNEL_n

CHANNEL_0

CHANNEL_1

CHANNEL_2

CHANNEL_3

FUNCTION

TYPE

RESET

VALUE

BIT #NAME

Reserved

R/W

D6-D0

B6S2_n -

B0S2_n

Arbitrary Transmit Pulse Shape, Segment 2

The shape of each channel's transmitted pulse can be made

independently user programmable by selecting “Arbitrary

Pulse” mode in

Table 5. The arbitrary pulse is divided into

eight time segments whose combined duration is equal to one

period of MCLK.

This 7 bit number represents the amplitude of the nth chan-

nel's arbitrary pulse during the second time segment. B6S2_n-

B0S2_n is in signed magnitude format with B6S2_n as the

sign bit and B0S2_n as the least significant bit (LSB).

R/W

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