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[v2-01] 2016-Oct-12

AS1130 − Register Description

Data Definition of the Single Frames

One frame consists of 2 datasets, the On/Off dataset and the

Blink & PWM dataset. Where more On/Off frames can be linked

to one PWM set. Depending on the used PWM sets more or less

On/Off frames can be stored inside the AS1130 (see Figure 32).

Each On/Off frame needs to define the used Blink & PWM

dataset.

Figure 32:

RAM Configuration

It is necessary to define the RAM configuration before data can

be written to the frame datasets. The RAM configuration is

defined in the AS1130 config register (see Figure 45) via bit 2:0

and bit 4 for Dot Correction.

Note(s): After a first write of data to the frames, the

configuration is locked in the AS1130 config register and can

be changed only after a reset of the device. A change of the

RAM configuration requires to re-write the frame datasets.

RAM Configuration

Blink & PWM Set

On/Off Frame

with Dot Correction

35..0

34..0

1,0

29..0

28..0

2,1,0

23..0

22..0

3..0

17..0

16..0

4..0

11..0

10..0

5..0

4..0

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