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STM32G030C6 Datasheet(PDF) 69 Page - STMicroelectronics

No. de pieza STM32G030C6
Descripción Electrónicos  Arm® Cortex®-M0 32-bit MCU, up to 64 KB Flash, 8 KB RAM, 2x USART, timers, ADC, comm. I/Fs, 2.0-3.6V
PDF  94 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32G030C6 Datasheet(HTML) 69 Page - STMicroelectronics

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DS12991 Rev 4
69/94
STM32G030x6/x8
Electrical characteristics
79
6 bits
1.5
43
390
3.5
100
2200
7.5
214
5600
12.5
357
10000
19.5
557
15000
39.5
1129
33000
79.5
2271
50000
160.5
4586
50000
1. Guaranteed by design.
2. I/O analog switch voltage booster must be enabled (BOOSTEN = 1 in the SYSCFG_CFGR1) when VDDA < 2.4 V and
disabled when VDDA ≥ 2.4 V.
Table 55. Maximum ADC RAIN . (continued)
Resolution
Sampling cycle at 35 MHz
Sampling time at 35 MHz
[ns]
Max. RAIN(1)(2)
(Ω)
Table 56. ADC accuracy(1)(2)(3)
Symbol
Parameter
Conditions(4)
Min
Typ
Max
Unit
ET
Total
unadjusted
error
VDDA=VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
-3
6.5
LSB
EO
Offset error
VDDA=VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
-1.5
4.5
LSB
EG
Gain error
VDDA=VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
-3
5
LSB
ED
Differential
linearity error
VDDA=VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
-1.2
1.5
LSB
EL
Integral linearity
error
VDDA=VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
-2.5
3
LSB
ENOB
Effective
number of bits
VDDA=VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
9.6
10.2
-
bit
SINAD
Signal-to-noise
and distortion
ratio
VDDA=VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
59.5
63
-
dB
SNR
Signal-to-noise
ratio
VDDA=VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
60
64
-
dB
THD
Total harmonic
distortion
VDDA=VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
--74
-70
dB



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