7708 datasheet(26/42 Pages) POWERINT

26 / 42 page

Rev. B 04/15

TFS7701-7708

www.power.com

During normal and brown-out operation the RESET pin senses

the turn-off clamp voltage via the resistor chain R36, R18, R19

and the internal controller determines the maximum safe duty

factor by comparing the RESET pin current with the LINE-

SENSE pin current. This feature guarantees that saturation of

the transformer is completely avoided in all conditions including

brown-out and load transients.

The LINE-SENSE pin also has a UV low threshold which turns

off the main converter when the input voltage is below 212 V.

This design in particular is intended to operate with a forced air

cooling at full load to maintain a heat sink temperature below

95 ºC at full load at worst-case ambient temperature. The

standby uses auto-restart to protect the standby output from

output overload. The main output is current limited by the

selected internal primary current limit of the main switch path.

See PCB layout in Figure 31. HiperTFS-2 small signal pin

decoupling capacitors are placed close to the HiperTFS-2.

Small signal components and traces connected to the

HiperTFS-2 are kept away or shielded from traces with large

switching voltages. The optocouplers are placed to minimize

capacitive coupling between their signal traces, and traces with

high-voltage switching. Small signal ground return, and ground

traces that conduct large switching currents, are segregated.

Proper PCB clearance is observed between the high-voltage

pins and traces, and low-voltage traces and components.

The Y capacitor (C21) is placed so that it has short direct

connections to the bulk capacitor B+ pin (C1), and the

transformer secondary pins (T1). The output rectifiers (D6 and

D7) are placed close to the secondary pins. The main output

capacitor (C10), is placed close to the main output connector.

Jumpers are used to augment the PCB traces in the high-

current secondary traces.

The primary bias diode (D12) and capacitor (C20), standby

output diode (D16) and capacitor (C17), are placed close to the

standby transformer (T2). C20 negative terminal is routed to the

bulk capacitor B- pin instead of to the HiperTFS-2 SOURCE or

GROUND pin. The 2nd standby output filter capacitor (C15) is

placed close to the standby output connector (J2).

PI-7030-052113

Figure 31. PCB Layout of Design Example Schematic in Figure 30.

7708 Datasheet(PDF) 26 Page - Power Integrations, Inc.

7708 Datasheet(HTML) 26 Page - Power Integrations, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

Datasheet Descarga

Enlace URL