Rev. B 04/15

15

TFS7701-7708

www.power.com

Primary Bias Support

The standby converter provides a minimum 15 V low-side bias

output used to bias the BYPASS pin of HiperTFS-2 through a

resistor to prevent the internal high-voltage bias current source

from becoming active. The low-side bias output (V

AUX) is also

the source for remote-on/off control circuitry and output OVP

latching triggering circuitry. This output should be capable of

delivering a minimum of 20 mA, plus any additional load from

other primary-side circuitry such as PFC controllers. The

primary V

AUX filter capacitor should be at least 330 mF to hold up

the V

AUX during start-up and standby output load dump.

Soft-Start

Forward converters typically require a soft-start circuit on the

main feedback loop to prevent output overshoot on start-up.

This soft-start circuit closes the feedback loop while the output

is still rising. However, this soft-start circuit by itself may not

prevent a small output glitch during the output rise time, which

can violate any output monotonicity specifications. To prevent

this problem, the main feedback loop soft-start must work in

conjunction with the HiperTFS-2 internal soft-start. The

HiperTFS-2 main converter has two built-in soft-start mechanisms:

the current limit, and a duty cycle limit, which starts at 30 % and

opens to 78 % over 12 ms. The feedback loop soft-start (R11

and C5 in Figure 16) needs to close the feedback loop (opto

needs to start conducting), and control the output rise while the

HiperTFS-2 is still in the current limit startup phase.

EMI

The frequency jitter feature modulates the switching frequency

over a small range as a means to reduce conducted EMI

average and quasi-peak measurement associated with the

harmonics of the fundamental switching frequency. This is

particularly beneficial for average conduction mode where the

sampling bandwidth is narrow. The modulation rate is nominally

250 Hz which is high enough to reduce EMI but low enough to

have minimal effect on output ripple (rejected by the control loop).

Transformer Design

It is recommended that the transformer be designed for an AC

p-p flux density of ~2900 Gauss during continuous operation at

nominal input voltage and maximum output power, and a

maximum peak-peak transient flux density no greater than

4000 Gauss. The turns ratio should be chosen for a nominal

duty factor of 45% at 385 VDC input. This yields a good

compromise between switching RMS currents, output diode

voltage ratings, and minimum input voltage at the end of

hold-up time.

Even though leakage inductance energy is partially recycled,

low-leakage-inductance construction (e.g., split primary,

secondary is sandwiched between series primary halves), is

recommended.

For optimal main and standby transformer design refer to AN-51

and use PIXls spreadsheet. Foil secondary windings are

recommended for outputs above 10 A.

Primary Clamp Scheme

Figure 2 shows two primary clamp schemes. Clamp-to-rail

offers higher efficiency, while clamp-to-ground allows regulation

down to a lower input voltage, extending hold-up time or

allowing use of a smaller input bulk capacitor. The HiperTFS-2

spreadsheet allows selection of either scheme.

HD

HS

D

G

S

HiperTFS VDDH

R

DR1

150 V

+V

BUS

RTN

DR2

L

FB

EN

BP

DSB

PI-5846-111810

CONTROL

HD

HS

D

G

S

HiperTFS VDDH

R

L

FB

EN

BP

DSB

PI-6078-111810

DR1

DR2

CONTROL

+V

BUS

RTN

Figure 14. Two Primary Clamp Schemes, (a) Clamp-to-Rail (Higher Efficiency) and (b) Clamp-to-Ground (Enables Output to Stay in Regulation to a Lower Input Voltage).

(a)

(b)