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STM32H7B3AI Datasheet(PDF) 146 Page - STMicroelectronics |
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STM32H7B3AI Datasheet(HTML) 146 Page - STMicroelectronics |
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146 / 238 page  Symbol Parameter Conditions Min(1) Typ(1) Max(1) Unit tSTAB ADC power-up time LDO already started 1 - - conversion cycle tCAL Offset and linearity calibration time - 165010 1/fADC tOFF_CAL Offset calibration time - 1280 tLATR Trigger conversion latency for regular and injected channels without aborting the conversion CKMODE = 00 1.5 2 2.5 CKMODE = 01 - - 2.5 CKMODE = 10 - - 2.5 CKMODE = 11 - - 2.25 tLATRINJ Trigger conversion latency for regular and injected channels when a regular conversion is aborted CKMODE = 00 2.5 3 3.5 CKMODE = 01 - - 3.5 CKMODE = 10 - - 3.5 CKMODE = 11 - - 3.25 tS Sampling time - 1.5 - 810.5 tCONV Total conversion time (including sampling time) N-bits resolution tS + 0.5 + N/2 - - IDDA_D(ADC) ADC consumption on VDDA, BOOST=11, Differential mode Resolution = 16 bits, fADC=25 MHz - 1440 - µA Resolution = 14 bits, fADC=30 MHz - 1350 - Resolution = 12 bits, fADC=40 MHz - 990 - ADC consumption on VDDA, BOOST=10, Differential mode fADC=25 MHz Resolution = 16 bits - 1080 - Resolution = 14 bits - 810 - Resolution = 12 bits - 585 - ADC consumption on VDDA, BOOST=01, Differential mode fADC=12.5 MHz Resolution = 16 bits - 630 - Resolution = 14 bits - 432 - Resolution = 12 bits - 315 - ADC consumption on VDDA, BOOST=00, Differential mode fADC=6.25 MHz Resolution = 16 bits - 360 - Resolution = 14 bits - 270 - Resolution = 12 bits - 225 - IDDA_SE(ADC) ADC consumption on VDDA, BOOST=11, Single-ended mode Resolution = 16 bits, fADC=25 MHz - 720 - µA Resolution = 14 bits, fADC=30 MHz - 675 - Resolution = 12 bits, fADC=40 MHz - 495 - ADC consumption on VDDA, BOOST=10, Single-ended mode fADC=25 MHz Resolution = 16 bits - 540 - Resolution = 14 bits - 405 - Resolution = 12 bits - 292.5 - ADC consumption on VDDA, BOOST=01, Single-ended mode fADC=12.5 MHz Resolution = 16 bits - 315 - Resolution = 14 bits - 216 - Resolution = 12 bits - 157.5 - ADC consumption on VDDA, BOOST=00, Single-ended mode fADC=6.25 MHz Resolution = 16 bits - 180 - Resolution = 14 bits - 135 - Resolution = 12 bits - 112.5 - IDD(ADC) ADC consumption on VDD fADC=50 MHz - 400 - STM32H7B3xI Operating conditions DS13139 - Rev 8 page 146/238 |
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