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STM32H7B3AI Datasheet(PDF) 147 Page - STMicroelectronics |
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STM32H7B3AI Datasheet(HTML) 147 Page - STMicroelectronics |
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147 / 238 page ![]() Symbol Parameter Conditions Min(1) Typ(1) Max(1) Unit IDD(ADC) ADC consumption on VDD fADC=25 MHz µA - 220 - fADC=12.5 MHz - 180 - fADC=6.25 MHz - 120 - fADC=3.125 MHz - 80 - 1. Guaranteed by design. 2. Depending on the package, VREF+ can be internally connected to VDDA and VREF- to VSSA. 3. These values are valid UFBGA176+25 and one ADC. The values for other packages and multiple ADCs might be different 4. The voltage booster on ADC switches must be used for VDDA < 2.4 V (embedded I/O switches). 5. The tolerance is 10 LSBs for 16-bit resolution, 4 LSBs for 14-bit resolution, and 2 LSBs for 12-bit, 10-bit and 8-bit resolutions. Table 94. Minimum sampling time vs RAIN Data valid up to 130 °C, with a 47 pF PCB capacitor and VDDA=1.6 V. Resolution RAIN (Ω) Minimum sampling time (s) Direct channels(1)(2) Fast channels(1)(3) Slow channels(1)(4) 16 bits 47 7.37E-08 1.14E-07 1.72E-07 14 bits 47 6.29E-08 9.74E-08 1.55E-07 68 6.84E-08 1.02E-07 1.58E-07 100 7.80E-08 1.12E-07 1.62E-07 150 9.86E-08 1.32E-07 1.80E-07 220 1.32E-07 1.61E-07 2.01E-07 12 bits 47 5.32E-08 8.00E-08 1.29E-07 68 5.74E-08 8.50E-08 1.32E-07 100 6.58E-08 9.31E-08 1.40E-07 150 8.37E-08 1.10E-07 1.51E-07 220 1.11E-07 1.34E-07 1.73E-07 330 1.56E-07 1.78E-07 2.14E-07 470 2.16E-07 2.39E-07 2.68E-07 680 3.01E-07 3.29E-07 3.54E-07 10 bits 47 4.34E-08 6.51E-08 1.08E-07 68 4.68E-08 6.89E-08 1.11E-07 100 5.35E-08 7.55E-08 1.16E-07 150 6.68E-08 8.77E-08 1.26E-07 220 8.80E-08 1.08E-07 1.40E-07 330 1.24E-07 1.43E-07 1.71E-07 470 1.69E-07 1.89E-07 2.13E-07 680 2.38E-07 2.60E-07 2.80E-07 1000 3.45E-07 3.66E-07 3.84E-07 1500 5.15E-07 5.35E-07 5.48E-07 2200 7.42E-07 7.75E-07 7.78E-07 3300 1.10E-06 1.14E-06 1.14E-06 8 bits 47 3.32E-08 5.10E-08 8.61E-08 68 3.59E-08 5.35E-08 8.83E-08 STM32H7B3xI Operating conditions DS13139 - Rev 8 page 147/238 |
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