NCO

Frequency

Register

32

Accumulator

32

RESET

CLK

PHSTR

32

32

Phase

Register

16

16

16

Look-Up

Table

sin

cos

Σ

Σ

16

16

fDAC

B0026-01

f

NCO +

freq

f

DAC

232

DAC5686

www.ti.com ............................................................................................................................................................ SLWS147F – APRIL 2003 – REVISED JUNE 2009

Table 5. Filter Taps for FIR1–FIR5 (continued)

FIR1

FIR2

FIR3

FIR4

FIR5 (INVSINC)

0

58

0

–24

0

8

The DAC5686 uses a numerically controlled oscillator (NCO) with a 32-bit frequency register and a 16-bit phase

register. The NCO is used in quadrature-modulation and single-sideband modes to provide sin and cos for

mixing. The NCO tuning frequency is programmed in registers 0x1 through 0x4. Phase offset is programmed in

registers 0x5 and 0x6. A block diagram of the NCO is shown in Figure 44.

Figure 44. Block Diagram of the NCO

The NCO accumulator is reset to zero when the PHSTR pin is high and remains at zero until PHSTR is set low.

Frequency word freq in the frequency register is added to the accumulator every clock cycle. The output

frequency of the NCO is:

While the maximum clock frequency of the DACs is 500 MSPS, the maximum clock frequency the NCO can

operate at is 320 MHz; mixing at DAC rates higher than 320 MSPS requires using the fDAC/4 mixing option.

Copyright © 2003–2009, Texas Instruments Incorporated

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