74LVC161DB datasheet(2/22 Pages) NEXPERIA

2 / 22 page

74LVC161

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Product data sheet

Rev. 6 — 30 September 2013

2 of 22

NXP Semiconductors

74LVC161

Presettable synchronous 4-bit binary counter; asynchronous reset

 JESD8-C/JESD36 (2.7 V to 3.6 V)

 Specified from

40 C to +85 C and 40 C to +125 C

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-B exceeds 200 V

 CDM JESD22-C101E exceeds 1000 V

Ordering information

Functional diagram

Table 1.

Ordering information

Type number

Package

Temperature range

Name

Description

Version

74LVC161D

40 Cto +125 C

SO16

plastic small outline package; 16 leads;

body width 3.9 mm

SOT109-1

74LVC161DB

40 Cto +125 C

SSOP16

plastic shrink small outline package; 16 leads;

body width 5.3 mm

SOT338-1

74LVC161PW

40 Cto +125 C

TSSOP16

plastic thin shrink small outline package; 16 leads;

body width 4.4 mm

SOT403-1

74LVC161BQ

40 Cto +125 C

DHVQFN16 plastic dual in-line compatible thermal enhanced very

thin quad flat package; no leads; 16 terminals;

body 2.5

 3.5  0.85 mm

SOT763-1

Fig 1.

Logic symbol

Fig 2.

IEC logic symbol

mna905

CEP

CET

mna906

/1,3,4+

1,2D

4 CT = 15

CTR4

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